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MC68HC000RC12 Datasheet, PDF (53/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual | |||
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Freescale Semiconductor, Inc.
STATE 7
On the falling edge of the clock entering S7, the processor negates AS,
UDS, or LDS. As the clock rises at the end of S7, the processor places
the address and data buses in the high-impedance state, and drives R/W
high. The device negates DTACK or BERR at this time.
5.1.3 Read-Modify-Write Cycle.
The read-modify-write cycle performs a read operation, modifies the data in the arithmetic
logic unit, and writes the data back to the same address. The address strobe ( AS) remains
asserted throughout the entire cycle, making the cycle indivisible. The test and set (TAS)
instruction uses this cycle to provide a signaling capability without deadlock between
processors in a multiprocessing environment. The TAS instruction (the only instruction
that uses the read-modify-write cycle) only operates on bytes. Thus, all read-modify-write
cycles are byte operations. The read-modify-write flowchart shown in Figure 5-8 and the
timing diagram in Figure 5-9, applies to the MC68000, the MC68HC000, the MC68HC001
(in 16-bit mode), the MC68EC000 (in 16-bit mode), and the MC68010.
BUS MASTER
ADDRESS THE DEVICE
1) SET R/W TO READ
2) PLACE FUNCTION CODE ON FC2âFC0
3) PLACE ADDRESS ON A23âA1
4) ASSERT ADDRESS STROBE (AS)
5) ASSERT UPPER DATA STROBE (UDS)
OR LOWER DATA STROBE (LDS)
ACQUIRE THE DATA
1) LATCH DATA
1) NEGATE UDS AND LDS
2) START DATA MODIFICATION
START OUTPUT TRANSFER
1) SET R/W TO WRITE
2) PLACE DATA ON D7âD0 OR D15âD8
3) ASSERT UPPER DATA STROBE (UDS)
OR LOWER DATA STROBE (LDS)
TERMINATE OUTPUT TRANSFER
1) NEGATE UDS OR LDS
2) NEGATE AS
3) REMOVE DATA FROM D7âD0 OR
D15âD8
4) SET R/W TO READ
START NEXT CYCLE
SLAVE
INPUT THE DATA
1) DECODE ADDRESS
2) PLACE DATA ON D7âD0 OR D15âD0
3) ASSERT DATA TRANSFER
ACKNOWLEDGE (DTACK)
TERMINATE THE CYCLE
1) REMOVE DATA FROM D7âD0
OR D15âD8
2) NEGATE DTACK
INPUT THE DATA
1) STORE DATA ON D7âD0 OR D15âD8
2) ASSERT DATA TRANSFER
ACKNOWLEDGE (DTACK)
TERMINATE THE CYCLE
1) NEGATE DTACK
Figure 5-8. Read-Modify-Write Cycle Flowchart
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
5-7
For More Information On This Product,
Go to: www.freescale.com
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