MC68HC000RC12 Datasheet, PDF (28/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
Table 2-2. Instruction Set Summary (Sheet 4 of 4)
Opcode
RTE
RTR
RTS
SBCD
Operation
If supervisor state
then (SP) → SR; SP + 2 → SP; (SP) → PC;
SP + 4 → SP;
restore state and deallocate stack according to (SP)
else TRAP
(SP) → CCR; SP + 2 → SP;
(SP) → PC; SP + 4 → SP
(SP) → PC; SP + 4 → SP
Destination10 – Source10 – X → Destination
Scc
STOP
SUB
If condition true
then 1s → Destination
else 0s → Destination
If supervisor state
then Immediate Data → SR; STOP
else TRAP
Destination – Source → Destination
SUBA
SUBI
SUBQ
SUBX
Destination – Source → Destination
Destination – Immediate Data → Destination
Destination – Immediate Data → Destination
Destination – Source – X → Destination
SWAP Register [31:16] ↔ Register [15:0]
TAS
Destination Tested → Condition Codes; 1 → bit 7 of
Destination
TRAP
SSP – 2 → SSP; Format/Offset → (SSP);
SSP – 4 → SSP; PC → (SSP); SSP–2 → SSP;
SR → (SSP); Vector Address → PC
TRAPV If V then TRAP
TST
Destination Tested → Condition Codes
UNLK An → SP; (SP) → An; SP + 4 → SP
NOTE: d is direction, L or R.
Syntax
RTE
RTR
RTS
SBCD Dx,Dy
SBCD –(Ax),–(Ay)
Scc <ea>
STOP # <data>
SUB <ea>,Dn
SUB Dn,<ea>
SUBA <ea>,An
SUBI # <data>,<ea>
SUBQ # <data>,<ea>
SUBX Dx,Dy
SUBX –(Ax),–(Ay)
SWAP Dn
TAS <ea>
TRAP # <vector>
TRAPV
TST <ea>
UNLK An
2-14
M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL
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