MC68HC000RC12 Datasheet, PDF (108/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
Table 7-3. Move Word Instruction Execution Times
Destination
Source
Dn
An
(An)
Dn
8(2/0)
8(2/0)
16(4/0)
An
8(2/0)
8(2/0)
16(4/0)
(An)
16(2/2)
16(2/2)
24(4/2)
(An)+
16(2/2)
16(2/2)
24(4/2)
–(An)
16(2/2)
16(2/2)
24(4/2)
(d16, An)
24(4/2)
24(4/2)
32(6/2)
(An)+
–(An)
(d _16, An)
16(4/0)
18(4/0)
24(6/0)
16(4/0)
18(4/0)
24(6/0)
24(4/2)
26(4/2)
32(6/2)
24(4/2)
26(4/2)
32(6/2)
24(4/2)
26(4/2)
32(6/2)
32(6/2)
34(6/2)
40(8/2)
(d _8, An, Xn)*
(xxx).W
(xxx).L
26(6/0)
24(6/0)
32(8/0)
26(6/0)
24(6/0)
32(8/0)
34(6/2)
32(6/2)
40(8/2)
34(6/2)
32(6/2)
40(8/2)
34(6/2)
32(6/2)
40(8/2)
42(8/2)
40(8/2)
48(10/2)
(d _16, PC)
24(6/0)
(d _8, PC, Xn)* 26(6/0)
#<data>
16(4/0)
24(6/0)
26(6/0)
16(4/0)
32(6/2)
34(6/2)
24(4/2)
32(6/2)
34(6/2)
24(4/2)
32(6/2)
34(6/2)
24(4/2)
40(8/2)
42(8/2)
32(6/2)
*The size of the index register (Xn) does not affect execution time.
(d8, An, Xn)*
26(4/2)
26(4/2)
34(6/2)
34(6/2)
32(6/2)
42(8/2)
44(8/2)
42(8/2)
50(10/2)
42(8/2)
44(8/2)
34(6/2)
(xxx).W
24(4/2)
24(4/2)
32(6/2)
32(6/2)
34(6/2)
40(8/2)
42(8/2)
40(8/2)
48(10/2)
40(8/2)
42(8/2)
32(6/2)
(xxx).L
32(6/2)
32(6/2)
40(8/2)
40(8/2)
42(8/2)
48(10/2)
50(10/2)
48(10/2)
56(12/2)
48(10/2)
50(10/2)
40(8/2)
Table 7-4. Move Long Instruction Execution Times
Destination
Source
Dn
An
(An) (An)+ –(An) (d16, An)
Dn
8(2/0) 8(2/0) 24(2/4) 24(2/4) 24(2/4) 32(4/4)
An
8(2/0) 8(2/0) 24(2/4) 24(2/4) 24(2/4) 32(4/4)
(An)
24(6/0) 24(6/0) 40(6/4) 40(6/4) 40(6/4) 48(8/4)
(An)+
–(An)
(d _16, An)
(d _8, An, Xn)*
(xxx).W
(xxx).L
24(6/0)
26(6/0)
32(8/0)
24(6/0)
26(6/0)
32(8/0)
40(6/4)
42(6/4)
48(8/4)
40(6/4)
42(6/4)
48(8/4)
40(6/4)
42(6/4)
48(8/4)
34(8/0) 34(8/0) 50(8/4) 50(8/4) 50(8/4)
32(8/0) 32(8/0) 48(8/4) 48(8/4) 48(8/4)
40(10/0) 40(10/0) 56(10/4) 56(10/4) 56(10/4)
48(8/4)
50(8/4)
56(10/4)
58(10/4)
56(10/4)
64(12/4)
(d _16, PC)
32(8/0)
(d _8, PC, Xn)* 34(8/0)
#<data>
24(6/0)
32(8/0)
34(8/0)
24(6/0)
48(8/4)
50(8/4)
40(6/4)
48(8/4)
50(8/4)
40(6/4)
48(8/4)
50(8/4)
40(6/4)
56(10/4)
58(10/4)
48(8/4)
*The size of the index register (Xn) does not affect execution time.
(d8, An, Xn)*
34(4/4)
34(4/4)
50(8/4)
50(8/4)
52(8/4)
58(10/4)
60(10/4)
58(10/4)
66(12/4)
58(10/4)
60(10/4)
50(8/4)
(xxx).W
32(4/4)
32(4/4)
48(8/4)
48(8/4)
50(8/4)
56(10/4)
58(10/4)
56(10/4)
64(12/4)
56(10/4)
58(10/4)
48(8/4)
(xxx).L
40(6/4)
40(6/4)
56(10/4)
56(10/4)
58(10/4)
64(12/4)
66(12/4)
64(12/4)
72(14/4)
64(12/4)
66(12/4)
56(10/4)
7.3 STANDARD INSTRUCTION EXECUTION TIMES
The numbers of clock periods shown in Table 7-5 indicate the times required to perform
the operations, store the results, and read the next instruction. The total number of clock
periods, the number of read cycles, and the number of write cycles are shown in the
previously described format. The number of clock periods, the number of read cycles, and
the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
7-3
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