MC68HC000RC12 Datasheet, PDF (164/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
10.14 MC68EC000 AC ELECTRICAL SPECIFICATIONS — READ AND
WRITE CYCLES (VCC=5.0 VDC ± 5;PC; GND = 0 VDC; TA = TL TO TH; (See Figures
10-12 and 10-13)
Num
Characteristic
8 MHz
10 MHz
12.5 MHz 16.67 MHz 20 MHz Unit
Min Max Min Max Min Max Min Max Min Max
6 Clock Low to Address Valid
— 35 — 35 — 35 — 30 — 25 ns
6A Clock High to FC Valid
— 35 — 35 — 35 — 30 0 25 ns
7 Clock High to Address, Data Bus — 55 — 55 — 55 — 50 — 42 ns
High Impedance (Maximum)
8 Clock High to Address, FC Invalid 0 — 0 — 0 — 0 — 0 — ns
(Minimum)
91 Clock High to AS , DS Asserted
3 35 3 35 3 35 3 30 3 25 ns
112 Address Valid to AS, DS Asserted 30 — 20 — 15 — 15 — 10 — ns
(Read)/AS Asserted (Write)
11A2 FC Valid to AS, DS Asserted
(Read)/ AS Asserted (Write)
45 — 45 — 45 — 45 — 40 — ns
121 Clock Low to AS , DS Negated
3 35 3 35 3 35 3 30 3 25 ns
132 AS, DS Negated to Address, FC
15 —
15 —
15 — 15 — 10 —
ns
Invalid
142 AS (and DS Read) Width
Asserted
270 — 195 — 160 — 120 — 100 — ns
14A2 DS Width Asserted (Write)
140 — 95 — 80 — 60 — 50 — ns
152 AS, DS Width Negated
150 — 105 — 65 — 60 — 50 — ns
16 Clock High to Control Bus High
Impedance
— 55 — 55 — 55 — 50 — 42 ns
172 AS, DS Negated to R/W Invalid
15 — 15 — 15 — 15 — 10 — ns
181 Clock High to R/W High (Read)
0 35 0 35 0 35 0 30 0 25 ns
201 Clock High to R/ W Low (Write)
0
35
0
35
0
35 0
30 0 25 ns
20A^2,6 AS Asserted to R/W Low (Write)
— 10 —
10 —
10 — 10 — 10 ns
212 Address Valid to R/W Low (Write) 0
—
0
—
0
—
0
— 0 — ns
21A2 FC Valid to R/W Low (Write)
60 — 50 — 30 — 30 — 25 — ns
222 R/ W Low to DS Asserted (Write) 80 — 50 — 30 — 30 — 25 — ns
23 Clock Low to Data-Out Valid
— 35 — 35 — 35 — 30 — 25 ns
(Write)
252 AS, DS Negated to Data-Out
Invalid (Write)
40 — 30 — 20 — 15 — 10 — ns
262 Data-Out Valid to DS Asserted
(Write)
40 — 30 — 20 — 15 — 10 — ns
275 Data-In Valid to Clock Low (Setup 5
—
5
—
5
—
5
— 5 — ns
Time on Read)
282 AS , DS Negated to DTACK
Negated (Asynchronous Hold)
0 110 0 110 0 110 0 110 0 95 ns
28A Clock High to DTACK Negated
0 110 0 110 0 110 0 110 0 95 ns
10-24
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
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