MC68HC000RC12 Datasheet, PDF (113/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
7.9 JMP, JSR, LEA, PEA, AND MOVEM INSTRUCTION
EXECUTION TIMES
Table 7-11 lists the timing data for the jump (JMP), jump to subroutine (JSR), load
effective address (LEA), push effective address (PEA), and move multiple registers
(MOVEM) instructions. The total number of clock periods, the number of read cycles, and
the number of write cycles are shown in the previously described format.
Table 7-11. JMP, JSR, LEA, PEA, and MOVEM Instruction Execution Times
Instruction Size
JMP
—
(An)
16 (4/0)
(An)+
—
–(An)
—
(d ₁₆ ,An) (d _8,An,Xn)+
18 (4/0)
22 (4/0)
(xxx).W
18 (4/0)
(xxx).L
24 (6/0)
JSR
— 32 (4/4)
—
—
34 (4/4)
38 (4/4)
34 (4/4) 40 (6/4)
LEA
— 8(2/0)
—
—
16 (4/0)
20 (4/0)
16 (4/0) 24 (6/0)
PEA
— 24 (2/4)
—
—
32 (4/4)
36 (4/4)
32 (4/4) 40 (6/4)
MOVEM
M→R
Word 24+8n 24+8n
—
32+8n
34+8n
32+8n
40+8n
(6+2n/0) (6+2n/0)
(8+2n/0) (8+2n/0) (10+n/0) (10+2n/0)
Long 24+16n 24+16n
—
32+16n
34+16n
32+16n 40+16n
(6+4n/0) (6+4n/0)
(8+4n/0) (8+4n/0) (8+4n/0) (8+4n/0)
MOVEM
R→M
Word 16+8n
(4/2n)
—
16+8n 24+8n
—
(4/2n) (6/2n)
26+8n
(6/2n)
24+8n
(6/2n)
32+8n
(8/2n)
Long 16+16n
(4/4n)
— 16+16n 24+16n 26+16n
—
(4/4n) (6/4n)
24+16n
(8/4n)
32+16n
(6/4n)
n is the number of registers to move.
*The size of the index register (Xn) does not affect the instruction's execution time.
(d ₁₆ PC) (d _8, PC, Xn)*
18 (4/0)
22 (4/0)
34 (4/4)
32 (4/4)
16 (4/0)
20 (4/0)
32 (4/4)
36 (4/4)
32+8n
(8+2n/0)
34+8n
(8+2n/0)
32+16n
(8+4n/0)
34+16n
(8+4n/0)
—
—
—
—
—
—
—
—
7.10 MULTIPRECISION INSTRUCTION EXECUTION TIMES
Table 7-12 lists the timing data for multiprecision instructions. The numbers of clock
periods include the times to fetch both operands, perform the operations, store the results,
and read the next instructions. The total number of clock periods, the number of read
cycles, and the number of write cycles are shown in the previously described format.
The following notation applies in Table 7-12:
Dn — Data register operand
M — Memory operand
7-8
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
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