MC68HC000RC12 Datasheet, PDF (128/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
SECTION 9
MC68010 INSTRUCTION EXECUTION TIMES
This section contains listings of the instruction execution times in terms of external clock
(CLK) periods for the MC68010. In this data, it is assumed that both memory read and
write cycles consist of four clock periods. A longer memory cycle causes the generation of
wait states that must be added to the total instruction times.
The number of bus read and write cycles for each instruction is also included with the
timing data. This data is shown as
n(r/w)
where:
n is the total number of clock periods
r is the number of read cycles
w is the number of write cycles
For example, a timing number shown as 18(3/1) means that 18 clock cycles are required
to execute the instruction. Of the 18 clock periods, 12 are used for the three read cycles
(four periods per cycle). Four additional clock periods are used for the single write cycle,
for a total of 16 clock periods. The bus is idle for two clock periods during which the
processor completes the internal operations required for the instructions.
NOTE
The total number of clock periods (n) includes instruction fetch
and all applicable operand fetches and stores.
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL
9-1
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