MC68HC908QL4 Datasheet, PDF (32/226 Pages) Motorola, Inc – Microcontrollers

Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$FE03
Break Flag Control ^Read: _BCFE
R
R
R
R
R
R
R
Register (BFCR) Write:
See page 191. _Reset:
0
Interrupt Status Register 1 ^{Read: IF6}
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
(INT1) Write: R
R
R
R
R
R
R
R
See page 127. _Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 2 ^{Read: IF14}
IF13
IF12
IF11
IF10
IF9
IF8
IF7
$FE05
(INT2) Write: R
R
R
R
R
R
R
R
See page 127. _Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 3 ^{Read: IF22}
IF21
IF20
IF19
IF18
IF17
IF16
IF15
$FE06
(INT3) Write: R
R
R
R
R
R
R
R
See page 128. _Reset:
0
0
0
0
0
0
0
0
$FE07
Reserved
$FE08
$FE09
$FE0A
$FE0B
$FE0C
$FE0D
↓
$FE0F
FLASH Control Register ^Read:
0
(FLCR) Write:
See page 35. _Reset:
0
Break Address High ^Read:
Register (BRKH) Write:
See page 190. _Reset:
Bit 15
0
Break Address Low ^Read: _{Bit 7}
Register (BRKL) Write:
See page 190. _Reset:
0
Break Status and Control ^Read:
Register (BRKSCR) Write:
See page 191. _Reset:
BRKE
0
LVI Status Register ^Read:
(LVISR) Write:
See page 99. _Reset:
LVIOUT
0
Reserved
0
0
Bit 14
0
Bit 6
0
BRKA
0
0
0
0
0
Bit 13
0
Bit 5
0
0
0
0
0
0
0
Bit 12
0
Bit 4
0
0
0
0
0
HVEN MASS ERASE PGM
0
0
0
0
Bit 11
Bit 10
Bit 9
Bit 8
0
0
0
0
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
0
0
0
0
FLASH Block Protect ^Read: _BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
0
$FFBE
Register (FLBPR) Write:
See page 40. _Reset:
Unaffected by reset
= Unimplemented
R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 7)
MC68HC908QL4 Data Sheet, Rev. 7
32
Freescale Semiconductor