MC68HC908QL4 Datasheet, PDF (182/226 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module (TIM)
NOTE
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 15-5. TIM Counter High Register (TCNTH)
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 15-6. TIM Counter Low Register (TCNTL)
15.8.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the counter. When the counter reaches
the modulo value, the overflow flag (TOF) becomes set, and the counter resumes counting from $0000
at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow interrupts until
the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
Bit 0
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
1
1
1
1
1
1
1
1
Figure 15-7. TIM Counter Modulo High Register (TMODH)
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
Bit 0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
1
1
1
1
1
1
1
Figure 15-8. TIM Counter Modulo Low Register (TMODL)
NOTE
Reset the counter before writing to the TIM counter modulo registers.
MC68HC908QL4 Data Sheet, Rev. 7
182
Freescale Semiconductor