MC68HC908QL4 Datasheet, PDF (30/226 Pages) Motorola, Inc – Microcontrollers

Memory
Addr.
Register Name
Bit 7
6
5
ADC10 Data Register Low ^{Read: AD7}
AD6
AD5
$003E
(ADRL) Write: R
R
R
See page 54. _Reset:
0
0
0
$003F
ADC10 Clock Register ^Read:
(ADCLK) Write:
See page 55. _Reset:
ADLPC
0
ADIV1
0
ADIV0
0
$0040
SLIC Control Register 1 ^Read:
0
(SLCC1) Write:
See page 139. _Reset:
0
0
INITREQ
0
1
SLIC Control Register 2 ^Read:
0
0
0
$0041
(SLCC2) Write:
See page 140. _Reset:
0
0
0
$0042
SLIC Status Register ^{Read: SLCACT}
0
INITACK
(SLCS) Write:
See page 141. _Reset:
0
0
1
SLIC Prescale Register ^Read: _RXFP1
RXFP0
0
$0043
(SLCP) Write:
See page 142. _Reset:
1
0
0
SLIC Bit Time Register High ^Read:
0
0
0
$0044
(SLCBTH) Write:
See page 143. _Reset:
0
0
0
SLIC Bit Time Register Low ^Read: _BT7
BT6
BT5
$0045
(SLCBTL) Write:
See page 143. _Reset:
0
0
0
SLIC State Vector Register ^Read:
0
0
I3
$0046
(SLCSV) Write:
See page 144. _Reset:
0
0
0
$0047
SLIC Data Length Code ^Read:
Register (SLCDLC) Write:
See page 148. _Reset:
TXGO
0
CHKMOD
0
DLC5
0
SLIC Identifier Register ^{Read: R7}
R6
R5
$0048
(SLCID) Write: T7
T6
T5
See page 149. _Reset:
0
0
0
SLIC Data Register 7 ^{Read: R7}
R6
R5
$0049
(SLCD7) Write: T7
T6
T5
See page 149. _Reset:
0
0
0
= Unimplemented
4
3
2
1
Bit 0
AD4
AD3
AD2
AD1
AD0
R
R
R
R
R
0
0
0
0
0
ADICLK MODE1 MODE0 ADLSMP ADACKEN
0
0
0
0
0
0
WAKETX TXABRT IMSG
SLCIE
0
0
0
0
SLCWCM BTM
0
0
0
SLCE
0
0
0
0
0
0
0
0
0
SLCF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BT12
BT11
BT10
BT9
BT8
0
0
0
0
0
0
BT4
BT3
BT2
BT1
0
0
0
0
0
I2
I1
I0
0
0
0
0
0
0
DLC4
DLC3
DLC2
DLC1
0
0
0
0
R4
R3
R2
R1
T4
T3
T2
T1
0
0
0
0
R4
R3
R2
R1
T4
T3
T2
T1
0
0
0
0
R = Reserved U = Unaffected
0
DLC0
0
R0
T0
0
R0
T0
0
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 7)
MC68HC908QL4 Data Sheet, Rev. 7
30
Freescale Semiconductor