MC68HC908QL4 Datasheet, PDF (147/226 Pages) Motorola, Inc – Microcontrollers

Registers
14.8.6.2 Byte Transfer Mode Operation
When byte transfer mode is enabled (BTM = 1), many of the interrupt sources for the SLCSV no longer
apply, as they are specific to LIN operations. Table 14-3 shows those interrupt sources which are
applicable to BTM operations. The value of the SLCSV for each interrupt source remains the same, as
well as the priority of the interrupt source.
I
Table 14-3. Interrupt Sources Summary (BTM = 1)
SLCSV
$00
$0C
I3 I2 I1 I0
0000
0011
$14
0101
$18
0110
$1C
0111
$28
1010
$38
1110
$3C
1111
Interrupt Source
No Interrupts Pending
TX Message Buffer Empty
RX Data Buffer Full
No Errors
Bit-Error
Receiver Buffer Overrun
Byte Framing Error
Reserved
Wakeup
Priority
0 (Lowest)
3
5
6
7
10
14
15 (Highest)
• No Interrupts Pending
This value indicates that all pending interrupt sources have been serviced. In polling mode, the
SLCSV is read and interrupts serviced until this value reads back 0. This source will not generate
an interrupt of the CPU, regardless of state of SLCIE.
• TX Message Buffer Empty
In byte transfer mode, this interrupt source indicates that the byte in the SLCID has been
transmitted.
• RX Data Buffer Full — No Errors
This interrupt source indicates that a byte has been received and is waiting in SLCID. To clear this
source, SLCID must be read first.
• Bit-Error
A unit that is sending a bit on the bus also monitors the bus. A BIT_ERROR must be detected at
that bit time, when the bit value that is monitored is different from the bit value that is sent.
• Receiver Buffer Overrun Error
This error is an indication that the receive buffer has not been emptied and additional byte(s) have
been received, resulting in lost data. Because this interrupt is higher priority than the receive buffer
full interrupts, it will appear first when an overflow condition occurs. There will, however, be a
pending receive interrupt which must also be cleared after the buffer overrun flag is cleared.
• Byte Framing Error
This error comes from the standard UART definition for byte encoding and occurs when STOP is
sampled and reads back as a 0. STOP should always read as 1.
• Wakeup
The wakeup interrupt source indicates that the SLIC module has entered SLIC run mode from SLIC
wait mode.
MC68HC908QL4 Data Sheet, Rev. 7
Freescale Semiconductor
147