MC68HC908QL4 Datasheet, PDF (20/226 Pages) Motorola, Inc – Microcontrollers

General Description
• Slave LIN interface controller (SLIC) module
– Full LIN messaging buffering of Identifier and 8 data bytes
– Automatic baud rate and LIN message frame synchronization:
No prior programming of bit rate required, 1–20 kbps LIN bus speed operation
All LIN messages will be received (no message loss due to synchronization process)
Input clock tolerance as high as ±50%, allowing internal oscillator to remain untrimmed
Incoming break symbols allowed to be 10 to 20 bit times without message loss
Supports automatic software trimming of internal oscillator using LIN synchronization data
– Automatic processing and verification of LIN SYNCH BREAK and SYNCH BYTE
– Automatic checksum calculation and verification with error reporting
– Maximum of 2 interrupts per LIN message frame
– Full LIN error checking and reporting
– High-speed LIN capability up to 83.33 kbps to 120.00 kbps
– Switchable UART-like byte transfer mode for processing bytes one at a time without LIN
message framing constraints
– Configurable digital receive filter
• 2-channel, 16-bit timer interface module (TIM) with external clock source input
• 6-channel, 10-bit analog-to-digital converter (ADC) with internal bandgap reference channel
(ADC10)
• 6-bit keyboard interrupt with wakeup feature (KBI)
– Programmable for rising/falling or high/low level detect
– Software selectable to use internal or external pullup/pulldown device
• External asynchronous interrupt pin with internal pullup (IRQ)
• Master asynchronous reset pin with internal pullup (RST)
• 13 bidirectional input/output (I/O) lines and one input only:
– Six shared with keyboard interrupt function
– Six shared with ADC10
– Two shared with TIM
– Two shared with SLIC
– One shared with reset
– One input only shared with external interrupt (IRQ)
– High current sink/source capability
– Selectable pullups on all ports (pullup/down on port A), selectable on an individual bit basis
– Three-state ability on all port pins
• Low-voltage inhibit (LVI) module features:
– Software selectable trip point in CONFIG register
MC68HC908QL4 Data Sheet, Rev. 7
20
Freescale Semiconductor