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MC68HC908QL4 Datasheet, PDF (24/226 Pages) Motorola, Inc – Microcontrollers
General Description
1.5 Pin Function Priority
Table 1-2 defines the priority of a shared pin if multiple functions are enabled. Only the shared pins are
shown in the table.
Table 1-2. Function Priority in Shared Pins
Pin Name
PTA0(1)
PTA1(1)
PTA2
Highest-to-Lowest Priority Sequence
AD0 → TCH1 → KBI0 → PTA0
AD1 → KBI1 → PTA1
TCLK → IRQ → KBI2 → PTA2(2)
PTA3
PTA4(1)
PTA5(1)
RST → KBI3 → PTA3
OSC2 → AD2 → KBI4 → PTA4
OSC1 → AD3 → KBI5 → PTA5
PTB0
TCH0 → PTB0
PTB1
PTB2(1)
PTB3(1)
PTB1
AD4 → PTB2
AD5 → PTB3
PTB4
SLCRx → PTB4
PTB5
SLCTx → PTB5
1. When a pin is to be used as an ADC pin, the I/O port function should be
left as an input. The ADC does not override the port data direction
register.
2. TCLK is not included in the priority scheme. When TCLK is enabled the
other shared functions in the pin should be disabled.
1.6 Unused Pin Termination
Input pins and I/O port pins that are not used in the application must be terminated. This prevents excess
current caused by floating inputs, and enhances immunity during noise or transient events. Termination
methods include:
1. Configuring unused pins as outputs and driving high or low;
2. Configuring unused pins as inputs and enabling internal pull-ups;
3. Configuring unused pins as inputs and using external pull-up or pull-down resistors.
Never connect unused pins directly to VDD or VSS.
Since some general-purpose I/O pins are not available on all packages, these pins must be terminated
as well. Either method 1 or 2 above are appropriate.
MC68HC908QL4 Data Sheet, Rev. 7
24
Freescale Semiconductor