MC68HC908QL4 Datasheet, PDF (127/226 Pages) Motorola, Inc – Microcontrollers

Exception Control
13.6.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources. Table 13-3 summarizes the
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
Table 13-3. Interrupt Sources
Priority
Source
Highest
Lowest
Reset
SWI instruction
IRQ pin
Timer channel 0 interrupt
Timer channel 1 interrupt
Timer overflow interrupt
SLIC interrupt
Keyboard interrupt
ADC conversion complete interrupt
Flag
—
—
IRQF1
CH0F
CH1F
TOF
SLCF
KEYF
COCO
Mask⁽¹⁾
—
—
IMASK1
CH0IE
CH1IE
TOIE
SLCIE
IMASKK
AIEN
INT
Register Flag
—
—
IF1
IF3
IF4
IF5
IF9
IF14
IF15
Vector
Address
$FFFE–$FFFF
$FFFC–$FFFD
$FFFA–$FFFB
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFEA–$FFEB
$FFE0–$FFE1
$FFDE–$FFDF
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
Bit 7
6
5
4
3
2
1
Bit 0
Read: IF6
IF5
IF4
IF3
0
IF1
0
0
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 13-11. Interrupt Status Register 1 (INT1)
IF1 and IF3–IF6 — Interrupt Flags
These flags indicate the presence of interrupt requests from the sources shown in Table 13-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 0, 1, and 3— Always read 0
13.6.2.1 Interrupt Status Register 2
Bit 7
6
5
4
3
2
Read: IF14
IF13
IF12
IF11
IF10
IF9
Write: R
R
R
R
R
R
Reset: 0
0
0
0
0
0
R = Reserved
1
Bit 0
IF8
IF7
R
R
0
0
Figure 13-12. Interrupt Status Register 2 (INT2)
IF7–IF14 — Interrupt Flags
This flag indicates the presence of interrupt requests from the sources shown in Table 13-3.
1 = Interrupt request present
0 = No interrupt request present
MC68HC908QL4 Data Sheet, Rev. 7
Freescale Semiconductor
127