XRT79L71_07 Datasheet, PDF (81/109 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
Operation Interrupt Enable Register - Byte 1 (Address = 0x0116)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
Unused
DS3/E3 LIU/
JA Block
Interrupt
Enable
DS3/E3
Framer
Block Inter-
rupt Enable
R/O
R/O
R/O
R/O
R/W
R/W
0
0
0
0
0
0
BIT 1
BIT 0
Unused
R/O
R/O
0
0
Operation Interrupt Enable Register - Byte 0 (Address = 0x0117)
BIT 7
R/O
0
BIT 6
Unused
R/O
0
BIT 5
R/O
0
BIT 4
Receive
ATM Cell/
PPP Proces-
sor BlockIn-
terrupt
Enable
R/W
0
BIT 3
R/O
0
BIT 2
Unused
R/O
0
BIT 1
R/O
0
BIT 0
Transmit
ATM Cell/
PPP Proces-
sor Block
Interrupt
Enable
R/W
0
These Operation Block Interrupt Enable registers permit the user to individually enable or disable the interrupt
requesting capability of the functional blocks within the XRT79L71. If a particular bit-field, within this register
contains the value "0", then the corresponding functional block has been disabled for generating any interrupt
requests. Conversely, if that bit-field contains the value "1", then the corresponding functional block has been
enabled for interrupt generation (e.g., those potential interrupts, within the enabled functional block that are
enabled at the source level are now enabled). The user should be aware of the fact that each functional block,
within the XRT79L71 contains multiple potential interrupt sources. Each of these lower lever interrupt sources
contain their own set of interrupt enable bits and interrupt status bits, existing in various on-chip registers.
STEP 2 - Interrupt Service Routing Branching: After reading the Operation Block Interrupt Status
Registers
The contents of the Operation Block Interrupt Status Registers permit the user to identify which of the seven (7)
functional blocks (within the XRT79L71 IC) have requested interrupt service. The µC/µP should use this
information in order to determine where, within the Interrupt Service Routine, program control should branch
to. The following table can be viewed as an interrupt service routine guide. It lists each of the Functional
Blocks that contain bit-fields in the Operation Block Interrupt Status and Enable registers. Additionally, this
table also presents a list and addresses of the corresponding on-chip Registers that the Interrupt Service
Routine should branch to and read, based upon the Interrupting Functional Block.
TABLE 5: INTERRUPT SERVICE ROUTINE GUIDE FOR THE XRT79L71
INTERRUPT FUNCTIONAL
BLOCK
THE NEXT REGISTER TO BE READ DURING THE INTERRUPT SERVICE ROUTINE
DS3/E3 Framer Block Framer Block Interrupt Status Register
DS3/E3 LIU/JA Block LIU Interrupt Status Register
ADDRESS
LOCATION
0x1105
0x1302
78