XRT79L71_07 Datasheet, PDF (50/109 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
REV. 1.0.0
PIN #
H2
H3
K3
NAME
RxUSoC/
RxPSOP
RxPSOC
RxUPrty/
RxPPrty/
RxPSOC
RxPEOP
TYPE
O
O
O
DESCRIPTION
Receive UTOPIA Interface - Start of Cell Indicator/Receive POS-PHY Inter-
face - Start of Packet Indicator (Packet Mode)/Receive POS-PHY Interface -
Start of Chunk Indicator (Chunk Mode):
The exact function of this output pin depends upon whether the XRT79L71 has
been configured to operate in the ATM UNI Mode, the PPP Packet Mode, or in
the PPP Chunk Mode as described below.
ATM UNI Mode - RxUSoC - Receive Start of Cell Indicator Output:
This output pin allows the ATM Layer Processor to determine the boundaries of
the ATM cells that are output via the Receive UTOPIA Data bus. The Receive
UTOPIA Interface block will assert this signal when the first byte (or word) of a
new cell is present on the Receive UTOPIA Data Bus; RxUData[15:0]. PPP
Packet Mode - RxPSOP - Receive Start of Packet Indicator Output (Packet
Mode):This output pin allows the Link Layer Processor to determine the bound-
aries of the PPP packets that are output via the Receive POS-PHY Data Bus.
The Receive POS-PHY Interface block will assert this signal when the first byte
(or word) of a new packet is present on the Receive POS-PHY Data Bus, RxP-
Data[15:0].
PPP Chunk Mode - RxPSOC - Receive Start of Chunk Indicator Output
(Chunk Mode):
If the XRT79L71 has been configured to operate in the Chunk Mode, then the
Receive POS-PHY Interface block will pulse this output pin "High" coincident to
whenever it outputs the very first byte (or 16-bit word) of a given Chunk onto the
Receive POS-PHY Data Bus (RxPData[15:0]) output pins. The Receive POS-
PHY Interface block will keep this output pin "Low" at all other times.
NOTE: In the PPP Chunk Mode, the RxPSOF output pin will function as the
Start of Packet Output Indicator pin.
Receive UTOPIA Interface - Parity Output pin/Receive POS-PHY Interface -
Parity Output:
The function of this output pin depends upon whether the XRT79L71 has been
configured to operate in the ATM UNI or the PPP Modes.
ATM UNI Mode - RxUPrty:
The Receive UTOPIA interface block will compute the odd-parity value of each
byte (or word) that it will place in the Receive UTOPIA Data Bus. This odd-par-
ity value will be output on this pin, while the corresponding byte (or word) is
present on the Receive UTOPIA Data Bus
PPP Mode - RxPPrty:
The Receive POS-PHY Interface block will compute the odd-parity value of
each byte (or word) that it will place in the Receive POS-PHY Data Bus. This
odd parity value will be output on this pin, which the corresponding byte (or
word) is present on the Receive POS-PHY Data Bus.
NOTE: This output pin will be in-active if the user has configured the XRT79L71
to operate in either the Clear-Channel Framer or in the High-Speed
HDLC Controller Modes.
Receive POS-PHY Interface - End of Packet:
The XRT79L71 drives this output pin "High" whenever the last byte of a given
Packet is being output via the RxPData[15:0] data bus.
NOTES:
1. This output pin is only valid when the XRT79L71 is configured to
operate in the PPP Mode.
2. This output pin is only valid when the Receive POS-PHY Interface -
Read Enable Output pin.
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