EZ-USB Datasheet, PDF (81/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

Table 5-4. Firmware Upload
Byte Field
0 bmRequest
1 bRequest
2 wValueL
3 wValueH
4 wIndexL
5 wIndexH
6 wLengthL
7 wLengthH
Value
0xC0
0xA0
AddrL
AddrH
0x00
0x00
LenL
LenH
Meaning
Vendor Request, IN
“Firmware Load”
Starting Address
Number of Bytes
8051 Response
None required
These requests are always handled by the EZ-USB core (ReNum=0 or 1). This means that
0xA0 is reserved by the EZ-USB chip, and therefore should never be used for a vendor
request. Cypress Semiconductor also reserves bRequest values 0xA1 through 0xAF, so
your system should not use these bRequest values.
A host loader program typically writes 0x01 to the CPUCS register to put the 8051 into
RESET, loads all or part of the EZ-USB RAM with 8051 code, and finally reloads the
CPUCS register with 0 to take the 8051 out of RESET. The CPUCS register is the only
USB register that can be written using the Firmware Download command.
Firmware loads are restricted to internal EZ-USB memory.
When ReNum=1 at Power-On
At power-on, the ReNum bit is normally set to zero so that the EZ-USB handles device
requests over CONTROL endpoint zero. This allows the core to download 8051 firm-
ware and then reconnect as the target device.
At power-on, the EZ-USB core checks the I²C bus for the presence of an EEPROM. If it
finds one, and the first byte of the EEPROM is 0xB2, the core copies the contents of the
EEPROM into internal RAM, sets the ReNum bit to 1, and un-RESETS the 8051. The
8051 wakes up ready-to-run firmware in RAM. The required data form at for this load
module is described in the next section.
Page 5-6
Chapter 5. EZ-USB CPU
EZ-USB TRM v1.9