EZ-USB Datasheet, PDF (181/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

connected to Vcc through a 1 µF capacitor and to GND through a 10-K resistor
(Figure 10-1). The oscillator and PLL are unaffected by the state of the RESET pin.
The CLK24 signal is active while RESET = HI. When RESET returns LO, the activity on
the CLK24 pin depends on whether or not the EZ-USB chip is in suspend state. If in sus-
pend, CLK24 stops. Resumption of USB bus activity or asserting the WAKEUP# pin LO
re-starts the CLK24 signal.
Power-on default values for all EZ-USB register bits are shown in Chapter 12, "EZ-USB
Registers." Table 10-1 summarizes reset states that affect USB device operation. Note
that the term “Power-On Reset” refers to a reset initiated by application of power, or by
assertion of the RESET pin.
Table 10-1. EZ-USB States After Power-On Reset (POR)
Item
Register
1 Endpoint Data
2 Byte Counts
3 CPUCS
4 PORT Configs
5 PORT Registers
6 PORT OEs
7 Interrupt Enables
8 Interrupt Reqs
9 Bulk IN C/S
10 Bulk OUT C/S*
11 Toggle Bits
12 USBCS
13 FNADDR
14 IN07VAL
15 OUT07VAL
16 INISOVAL
17 OUTISOVAL
18 USBPAIR
19 USBBAV
20 Configuration
21 Alternate Setting
Default Value
Comment
xxxxxxxx
xxxxxxxx
rrrr0011
rrrr=rev number, b1 =CLK24OE, b0=8051RES
00000000
IO, not alternate functions
xxxxxxxx
00000000
Inputs
00000000
Disabled
00000000
Cleared
00000000
Bulk IN endpoints not busy (unarmed)
00000000
Bulk OUT endpoints not busy (unarmed)
00000000
Data toggles = 0
00000100
RENUM=0, DISCOE=1 (Discon pin drives)
00000000
USB Function Address
01010111
EP0,1,2,4,6 IN valid
01010101
EP0,2,4,6 OUT valid
00000111
EP8,9,10 IN valid
00000111
EP8,910OUT valid
0x000000
ISOsend0 (b7) = 0, no pairing
00000000
Break condition cleared, no Autovector
0
Internal EZ-USB core value
0
Internal EZ-USB core value
* When the 8051 is released from reset, the EZ-USB automatically arms the Bulk OUT
endpoints by setting their CS registers to 000000010b.
Page 10-2
Chapter 10. EZ-USB Resets
EZ-USB TRM v1.9