EZ-USB Datasheet, PDF (165/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

USB Signaling - These include 16 bulk endpoint interrupts, three interrupts not
specific to a particular endpoint (SOF), Suspend, USB Reset), and two
interrupts for CONTROL transfers (SUTOK, SUDAV). These interrupts
share the USB interrupt (INT2). The AN2122/26 versions have an inter-
rupt indicating that a bulk packet was NAKd.
I²C Transfers - (INT3).
9.3 Wakeup Interrupt
Chapter 10, "EZ-USB Resets" describes suspend-resume signaling in detail, along with a
code example that uses the Wakeup interrupt.
Briefly, the USB host puts a device into SUSPEND by stopping bus activity to the device.
When the EZ-USB core detects 3 ms of no bus activity, it activates the USB suspend inter-
rupt request. If enabled, the 8051 takes the suspend interrupt, does power management
housekeeping (shutting down power to external logic), and finishes by setting SFR bit
PCON.0. This signals the EZ-USB core to enter a very low power mode by turning off the
12-MHz oscillator.
When the 8051 sets PCON.0, it enters an idle state. 8051 execution is resumed by activa-
tion of any enabled interrupt. The EZ-USB chip uses a dedicated interrupt for USB
Resume. When external logic pulls WAKEUP# low (for example, when a keyboard key is
pressed or a modem receives a ring signal) or USB bus activity resumes, the EZ-USB core
re-starts the 12-MHz oscillator, allowing the 8051 to recognize the interrupt and continue
executing instructions.
Resume signal
from EZ-USB core
EICON.5
S
R
EICON.4(rd)
EICON.4(0)
8051
"RESUME"
Interrupt
Figure 9-1. EZ-USB Wakeup Interrupt
Figure 9-1 shows the 8051 SFR bits associated with the RESUME interrupt. The EZ-USB
core asserts the resume signal when the EZ-USB core senses a USB Global Resume, or
when the EZ-USB WAKEUP# pin is pulled low. The 8051 enables the RESUME inter-
rupt by setting EICON.5.
Page 9-2
Chapter 9. EZ-USB Interrupts
EZ-USB TRM v1.9