EZ-USB Datasheet, PDF(320/334 Page) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

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EZ-USB Datasheet, PDF (320/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

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C.3.4 Mode 2

Mode 2 provides asynchronous, full-duplex communication, using a total of 11 bits: 1 start

bit, 8 data bits, a programmable 9th bit, and 1 stop bit. The data bits are transmitted and

received LSB first. For transmission, the 9th bit is determined by the value in TB8_0 (or

TB8_1). To use the 9th bit as a parity bit, move the value of the P bit (SFR PSW.0) to TB8_0

(or TB8_1).

The mode 2 baud rate is either CLK24/32 or CLK24/64, as determined by the SMOD0 (or

SMOD1) bit. The formula for the mode 2 baud rate is:

Baud Rate =

SMODx

2 x CLK24

64

Mode 2 operation is identical to the standard 8051.

C.3.4.1 Mode 2 Transmit

Figure C-13. illustrates the mode 2 transmit timing. Transmission begins after the first roll

over of the divide-by-16 counter following a software write to SBUF0 (or SBUF1). The

UART shifts data out on the TXD0 (or TXD1) pin in the following order: start bit, data bits

(LSB first), 9th bit, stop bit. The TI_0 (or TI_1) bit is set when the stop bit is placed on the

TXD0 (or TXD1) pin.

C.3.4.2 Mode 2 Receive

Figure C-14. illustrates the mode 2 receive timing. Reception begins at the falling edge of a

start bit received on the RXD0 (or RXD1) pin, when enabled by the REN_0 (or REN_1) bit.

For this purpose, the RXD0 (or RXD1) pin is sampled 16 times per bit for any baud rate.

When a falling edge of a start bit is detected, the divide-by-16 counter used to generate the

receive clock is reset to align the counter roll over to the bit boundaries.

For noise rejection, the serial port establishes the content of each received bit by a majority

decision of 3 consecutive samples in the middle of each bit time. This is especially true for the

start bit. If the falling edge on the RXD0 (or RXD1) pin is not verified by a majority decision

of 3 consecutive samples (low), then the serial port stops reception and waits for another

falling edge on the RXD0 (or RXD1) pin.

At the middle of the stop bit time, the serial port checks for the following conditions:

â¢ RI_0 (or RI_1) = 0, and

â¢ If SM2_0 (or SM2_1) = 1, the state of the stop bit is 1.

(If SM2_0 (or SM2_1) = 0, the state of the stop bit doesnât matter.)

C - 24

Appendix C: 8051 Hardware Description

EZ-USB TRM v1.9

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