EZ-USB Datasheet, PDF (144/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

7.3.12 Firmware Load
The USB endpoint zero protocol provides a mechanism for mixing vendor-specific
requests with the previously described standard device requests. Bits 6:5 of the bmRe-
quest field are set to 00 for a standard device request, and to 10 for a vendor request.
Table 7-21. Firmware Download
Byte
Field
0 bmRequestType
1 bRequest
2 wValueL
3 wValueH
4 wIndexL
5 wIndexH
6 wLengthL
7 wLengthH
Value
Meaning
0x40 Vendor Request, OUT
0xA0 “Firmware Load”
AddrL Starting address
AddrH
0x00
0x00
LenL Number of bytes
LenH
8051 Response
None required
Byte
Field
0 bmRequestType
1 bRequest
2 wValueL
3 wValueH
4 wIndexL
5 wIndexH
6 wLengthL
7 wLengthH
Table 7-22. Firmware Upload
Value
Meaning
0xC0 Vendor Request, IN
0xA0 “Firmware Load”
AddrL Starting address
AddrH
0x00
0x00
LenL Number of Bytes
LenH
8051 Response
None Required
The EZ-USB core responds to two endpoint zero vendor requests, RAM Download and
RAM Upload. These requests are active in all modes (ReNum=0 or 1).
Because bit 7 of the first byte of the SETUP packet specifies direction, only one bRequest
value (0xA0) is required for the upload and download requests. These RAM load com-
mands are available to any USB device that uses the EZ-USB chip.
A host loader program typically writes 0x01 to the CPUCS register to put the 8051 into
RESET, loads all or part of the EZ-USB internal RAM with 8051 code, and finally reloads
the CPUCS register with 0 to take the 8051 out of RESET. The CPUCS register is the
only USB register that can be written using the Firmware Download command.
EZ-USB TRM v1.9
Chapter 7. EZ-USB CPU
Page 7-23