EZ-USB Datasheet, PDF (171/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

The USBIEN and USBIRQ registers control the first five interrupts shown in Figure 9-2.
The IN07IEN and OUT07 registers control the remaining 16 USB interrupts, which corre-
spond to the 16 bulk endpoints IN0-IN7 and OUT0-OUT7.
The 21 USB interrupts are now described in detail.
9.5 SUTOK, SUDAV Interrupts
SETUP Stage
S
E
T
U
P
A
D
D
R
E
N
D
P
C
R
C
5
Token Packet
D
C
A 8 bytes R
T Setup C
A Data 1
0
6
Data Packet
A
C
K
H/S Pkt
SUTOK
Interrupt
SUDAV
Interrupt
Figure 9-5. SUTOK and SUDAV Interrupts
SUTOK and SUDAV are supplied to the 8051 by EZ-USB CONTROL endpoint zero.
The first portion of a USB CONTROL transfer is the SETUP stage shown in Figure 9-5.
(A full CONTROL transfer is the SETUP stage shown in Figure 7-1.) When the EZ-USB
core decodes a SETUP packet, it asserts the SUTOK (SETUP Token) interrupt request.
After the EZ-USB core has received the eight bytes error-free and copied them into eight
internal registers at SETUPDAT, it asserts the SUDAV interrupt request.
The 8051 program responds to the SUDAV interrupt by reading the eight SETUP data
bytes in order to decode the USB request (Chapter 7, "EZ-USB Endpoint Zero").
The SUTOK interrupt is provided to give advance warning that the eight register bytes at
SETUPDAT are about to be over-written. It is useful for debug and diagnostic purposes.
Page 9-8
Chapter 9. EZ-USB Interrupts
EZ-USB TRM v1.9