EZ-USB Datasheet, PDF (227/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

INnBC
Endpoint (1-7) IN Byte Count
b7
b6
b5
b4
b3
b2
-
D6
D5
D4
D3
D2
R/W
R/W
R/W
R/W
R/W
R/W
x
x
x
x
x
x
* See Table 12-5 for individual byte count register addresses.
Figure 12-27. IN Byte Count Registers
7FB7-7FC3*
b1
b0
D1
D0
R/W
R/W
x
x
The 8051 writes this register with the number of bytes it loaded into the IN endpoint
buffer INnBUF. Writing this register also arms the endpoint by setting the endpoint BSY
bit to 1.
Legal values for these registers are 0-64. A zero transfer size is used to terminate a trans-
fer that is an integral multiple of MaxPacketSize. For example, a 256-byte transfer with
maxPacketSize = 64, would require four packets of 64 bytes each plus one packet of 0
bytes.
The IN byte count should never be written while the endpoint’s BUSY bit is set.
When the register pairing feature is used (Section 6, "EZ-USB Bulk Transfers") IN2BC is
used for the EP2/EP3 pair, IN4BC is used for the EP4/EP5 pair, and IN6BC is used for the
EP6/EP7 pair. In the paired (double-buffered) mode, after the first write to the even-num-
bered byte count register, the endpoint BSY bit remains at 0, indicating that only one of
the buffers is full, and the other is still empty. The odd numbered byte count register is not
used when endpoints are paired.
Page 12-34
Chapter 12. EZ-USB Registers
EZ-USB TRM v1.9