EZ-USB Datasheet, PDF (219/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

USBBAV
Breakpoint and Autovector
b7
b6
b5
b4
b3
b2
b1
-
-
-
-
BREAK BPPULSE BPEN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
Figure 12-21. Breakpoint and Autovector Register
7FAF
b0
AVEN
R/W
0
Bit 3:
BREAK Breakpoint enable
The BREAK bit is set when the 8051 address bus matches the address held in the bit
breakpoint address registers (next page). The BKPT pin reflects the state of this bit. The
8051 writes a “1” to the BREAK bit to clear it. It is not necessary to clear the BREAK bit
if the pulse mode bit (BPPULSE) is set.
Bit 2:
BPPULSE Breakpoint pulse mode
The 8051 sets this bit to “1” to pulse the BREAK bit (and BKPT pin) high for 8 CLK24
cycles when the 8051 address bus matches the address held in the breakpoint address reg-
isters. when this bit is set to “0,” the BREAK bit (and BKPT pin) remains high until it is
cleared by the 8051.
Bit 1:
BPEN
Breakpoint enable
If this bit is “1,” a BREAK signal is generated whenever the 16-bit address lines match the
value in the Breakpoint Address Registers (BPADDRH/L). The behavior of the BREAK
bit and associated BKPT pin signal is either latched or pulsed, depending on the state of
the BPPULSE bit.
Bit 0:
AVEN
Auto-vector enable
If this bit is “1,” the EZ-USB Auto-vector feature is enabled. If it is 0, the auto-vector fea-
ture is disabled. See Chapter 9, "EZ-USB Interrupts" for more information on the auto-
vector feature.
Page 12-26
Chapter 12. EZ-USB Registers
EZ-USB TRM v1.9