EZ-USB Datasheet, PDF (281/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

Appendix B: 8051 Architectural Overview
B.1 Introduction
This appendix provides a technical overview and description of the 8051 core architecture.
8051_ram_128
8051_cpu
(80..FFh indirect)
8051_ram_128
(lower 128 Byte RAM)
(0..7Fh direct/indirect)
8051_control
8051_alu
8051_
main_regs
8051_biu
8051_op_decoder
8051
8051_timer
Timers 0 and 1
8051_timer2
Timer 2
PC4/TO, PC5/T1
PA0/t0_out,
PA1/t0_out
PB0/T2
PB1/t2ex
PB7/t2out
8051_intr_0
or
8051_intr_1
Interrupt Unit
8051_serial
Serial Port 0
PC1/TxD0
PC0/rxd0in
PA6/rxd0out
8051_serial
Serial Port 1
PB3/txd1
PB2/rxd1in
PA7/rxd1out
interrupts
port_control
A15-A0
D7 - D0
CLK24
RESET#
Figure B-1. 8051 Block Diagram
EZ-USB TRM v1.9
Appendix B: 8051 Architectural Overview
B-1