EZ-USB Datasheet, PDF (147/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

8.2 Isochronous IN Transfers
IN transfers travel from device to host. Figure 8-2 shows the EZ-USB registers and bits
associated with isochronous IN transfers.
Registers Associated with an ISO IN endpoint
(EP8IN shown as example)
Initialization
Data transfer
INISOVAL ^{15 14 13 12 11 10 9 8}
Endpoint Valid (1=valid)
IN8DATA ^{7 6 5 4 3 2 1 0}
Data to USB
IN8ADDR ^{A9 A8 A7 A6 A5 A4 0 0}
FIFO Start Address (see text)
USBPAIR 7 6 5 4 3 2 1 0
ISOSEND0 (see text)
USBIRQ ^{7 6 5 4 3 2 1 0}
SOFIR (1=clear request)
USBIEN ^{7 6 5 4 3 2 1 0}
SOFIE (1=enabled)
Figure 8-2. Isochronous IN Endpoint Registers
8.2.1 Initialization
To initialize an isochronous IN endpoint, the 8051 performs the following:
• Sets the endpoint valid bit for the endpoint.
• Sets the endpoint’s FIFO size by loading a starting address (Section 8.4, "Setting
Isochronous FIFO Sizes").
• Sets the ISOSEND0 bit in the USBPAIR register for the desired response.
• Enables the SOF interrupt. All isochronous endpoints are serviced in response to
the SOF interrupt.
Page 8-2
Chapter 8. EZ-USB CPU
EZ-USB TRM v1.9