EZ-USB Datasheet, PDF (211/334 Pages) Cypress Semiconductor – The EZ-USB USB Integrated Circuit

Bit 0:
DONE
I²C Transfer DONE
The I²C controller sets this bit whenever it completes a byte transfer, right after the ACK
stage. The controller also generates an I²C interrupt request (8051 INT3) when it sets the
DONE bit. The I²C controller automatically clears the DONE bit and the I²C interrupt
request bit whenever the 8051 reads or writes the I2DAT register.
I2CMODE
b7
b6
0
0
R
R
0
0
I²C Mode
b5
b4
b3
b2
0
0
0
0
R
R
R
R
0
0
0
0
Figure 12-15. I²C Mode Register
b1
STOPIE
R/W
0
7FA7
b0
0
R
0
The I²C interrupt includes one additional interrupt source in the AN2122/AN2126, a 1-0
transition of the STOP bit. To enable this interrupt, set the STOPIE bit in the I2CMODE
register. The 8051 determines the interrupt source by checking the DONE and STOP bits
in the I2CS register.
Page 12-18
Chapter 12. EZ-USB Registers
EZ-USB TRM v1.9