EP3SE110F1152I3N Datasheet, PDF (333/341 Pages) Altera Corporation – Stratix III Device Handbook

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–323
Table 1–192 and Table 1–193 list the regional clock timing parameters for EP3SE110
devices.
Table 1–192. EP3SE110 Column Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
Units
1.828
1.849
2.578 2.811 3.155 3.082 3.560 2.811 3.155 3.082 3.560 ns
1.828
1.849
2.578 2.811 3.155 3.082 3.560 2.811 3.155 3.082 3.560 ns
-0.008
-0.022 -0.254 -0.299 -0.255 -0.186 -0.021 -0.299 -0.255 -0.186 -0.021 ns
-0.008
-0.022 -0.254 -0.299 -0.255 -0.186 -0.021 -0.299 -0.255 -0.186 -0.021 ns
Table 1–193. EP3SE110 Row Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.798
1.716
0.001
-0.081
1.924
1.833
0.076
-0.015
C2
V_CCL=
1.1 V
2.631
2.489
-0.188
-0.330
C3
V_CCL=
1.1 V
2.860
2.697
-0.262
-0.425
C4
V_CCL=
1.1 V
3.204
3.023
-0.231
-0.412
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.101 3.332
2.930 3.173
-0.184 -0.229
-0.355 -0.388
I3
V_CCL=
1.1 V
2.920
2.750
-0.218
-0.388
I4
V_CCL=
1.1 V
3.268
3.079
-0.180
-0.369
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.163 3.373
2.984 3.214
-0.134 -0.277
-0.313 -0.436
Units
ns
ns
ns
ns
Table 1–194 and Table 1–195 list the periphery clock timing parameters for EP3SE110
devices.
Table 1–194. EP3SE110 Column Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial
1.564
1.564
-0.019
-0.019
Commercial
1.585
1.584
-0.019
-0.019
C2
V_CCL=
1.1 V
2.309
2.308
-0.245
-0.245
C3
V_CCL=
1.1 V
2.566
2.566
-0.310
-0.310
C4
V_CCL=
1.1 V
2.951
2.951
-0.267
-0.267
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.843 3.398
2.843 3.398
-0.194 -0.018
-0.194 -0.018
I3
V_CCL=
1.1 V
2.566
2.566
-0.310
-0.310
I4
V_CCL=
1.1 V
2.951
2.951
-0.267
-0.267
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.843 3.398
2.843 3.398
-0.194 -0.018
-0.194 -0.018
Units
ns
ns
ns
ns
Table 1–195. EP3SE110 Row Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.423
1.341
0.001
-0.081
1.502
1.411
0.069
-0.022
C2
V_CCL=
1.1 V
2.156
2.011
-0.195
-0.337
C3
V_CCL=
1.1 V
2.411
2.248
-0.271
-0.434
C4
V_CCL=
1.1 V
2.781
2.600
-0.241
-0.422
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.659 2.934
2.488 2.775
-0.188 -0.238
-0.359 -0.397
I3
V_CCL=
1.1 V
2.455
2.285
-0.222
-0.392
I4
V_CCL=
1.1 V
2.826
2.637
-0.190
-0.379
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.704 2.949
2.525 2.790
-0.139 -0.288
-0.318 -0.447
Units
ns
ns
ns
ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2