EP3SE110F1152I3N Datasheet, PDF (304/341 Pages) Altera Corporation – Stratix III Device Handbook

1–294
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–133. EP3SE260 Column Pins Output Timing Parameters (Part 7 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL=
V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
4mA _GCLK
PLL ^tco
3.491
3.934
3.524
3.923
5.175 5.343 5.945 5.728 6.150 5.343 5.945 5.728 6.150 ns
5.810 6.027 6.592 6.420 6.994 6.027 6.592 6.420 6.994 ns
GCLK t_co
6mA _GCLK
PLL ^tco
3.483
3.926
3.516
3.915
5.166 5.334 5.928 5.719 6.141 5.334 5.928 5.719 6.141 ns
5.801 6.018 6.583 6.411 6.977 6.018 6.583 6.411 6.977 ns
1.2-V
HSTL
CLASS I
GCLK t_co
8mA _GCLK
PLL ^tco
3.484
3.927
3.517
3.916
5.174 5.342 5.924 5.728 6.150 5.342 5.924 5.728 6.150 ns
5.809 6.026 6.592 6.420 6.973 6.026 6.592 6.420 6.973 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.473
3.916
3.506
3.905
5.161 5.329 5.901 5.714 6.136 5.329 5.901 5.714 6.136 ns
5.796 6.013 6.578 6.406 6.950 6.013 6.578 6.406 6.950 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.473
3.916
3.506
3.905
5.161 5.329 5.902 5.715 6.137 5.329 5.902 5.715 6.137 ns
5.796 6.013 6.579 6.407 6.951 6.013 6.579 6.407 6.951 ns
1.2-V
HSTL
CLASS II
GCLK t_co
16mA _GCLK
PLL ^tco
3.494
3.937
3.527
3.926
5.177 5.344 5.980 5.728 6.150 5.344 5.980 5.728 6.150 ns
5.812 6.028 6.592 6.420 7.029 6.028 6.592 6.420 7.029 ns
3.0-V PCI —
GCLK t_co
GCLK
PLL ^tco
3.597
4.040
3.630
4.029
5.222 5.378 5.955 5.753 6.175 5.378 5.955 5.753 6.175 ns
5.857 6.062 6.617 6.445 7.004 6.062 6.617 6.445 7.004 ns
3.0-V
PCI-X
GCLK t_co 3.597
—
GCLK
PLL ^tco
4.040
3.630
4.029
5.222 5.378 5.955 5.753 6.175 5.378 5.955 5.753 6.175 ns
5.857 6.062 6.617 6.445 7.004 6.062 6.617 6.445 7.004 ns
Table 1–134 lists the EP3SE260 row pins output timing parameters for single-ended
I/O standards.
Table 1–134. EP3SE260 Row Pins Output Timing Parameters (Part 1 of 5)
I/O
Standard
Clock
3.3-V
LVTTL
4mA
GCLK t_co
GCLK
PLL
t_co
8mA
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
12mA
GCLK
PLL
t_co
Fast Model
Industrial Commercial
C2
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.648
3.902 5.663 5.865 6.484 6.256 6.709 6.063 6.530 6.256 6.709 ns
1.582
1.785 2.228 2.322 2.505 2.489 2.454 2.441 2.632 2.489 2.454 ns
3.555
3.797 5.533 5.727 6.340 6.112 6.565 5.922 6.414 6.112 6.565 ns
1.489
1.680 2.098 2.184 2.361 2.346 2.310 2.300 2.483 2.346 2.310 ns
3.456
3.707 5.414 5.604 6.212 5.995 6.446 5.795 6.315 5.995 6.446 ns
1.390
1.574 1.979 2.061 2.233 2.250 2.182 2.173 2.354 2.250 2.182 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation