EP3SE110F1152I3N Datasheet, PDF (210/341 Pages) Altera Corporation – Stratix III Device Handbook

1–200
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–98. EP3SL340 Row Pins Output Timing Parameters (Part 2 of 3)
I/O Standard
Clock
Fast Model
Industrial Commercial
C2
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
4mA _GCLK
PLL ^tco
3.438
1.489
3.708
1.677
5.456 5.652 6.194 6.041 6.418 5.789 6.327 6.177 6.497 ns
2.197 2.291 2.520 2.524 2.561 2.401 2.631 2.633 2.549 ns
DIFFERENTIAL
1.5-V
6mA
HSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.427
1.478
3.698
1.667
5.452 5.648 6.191 6.038 6.415 5.786 6.324 6.174 6.494 ns
2.193 2.287 2.517 2.521 2.558 2.398 2.628 2.630 2.546 ns
GCLK t_co
8mA _GCLK
PLL ^tco
3.424
1.475
3.695
1.664
5.450 5.646 6.189 6.036 6.413 5.784 6.323 6.173 6.493 ns
2.191 2.285 2.515 2.519 2.556 2.396 2.627 2.629 2.545 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.435
1.486
3.705
1.674
5.451 5.647 6.188 6.035 6.412 5.784 6.321 6.171 6.491 ns
2.192 2.286 2.514 2.518 2.555 2.396 2.625 2.627 2.543 ns
GCLK t_co
6mA _GCLK
PLL ^tco
3.425
1.476
3.696
1.665
5.449 5.645 6.187 6.034 6.411 5.783 6.321 6.171 6.491 ns
2.190 2.284 2.513 2.517 2.554 2.395 2.625 2.627 2.543 ns
DIFFERENTIAL
1.8-V HSTL
8mA
CLASS I
GCLK t_co
GCLK
PLL ^tco
3.411
1.462
3.682
1.651
5.434 5.630 6.173 6.020 6.397 5.768 6.306 6.156 6.476 ns
2.175 2.269 2.499 2.503 2.540 2.380 2.610 2.612 2.528 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.408
1.459
3.678
1.647
5.430 5.626 6.169 6.016 6.393 5.764 6.302 6.152 6.472 ns
2.171 2.265 2.495 2.499 2.536 2.376 2.606 2.608 2.524 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.405
1.456
3.676
1.645
5.431 5.629 6.172 6.019 6.396 5.767 6.306 6.156 6.476 ns
2.172 2.268 2.498 2.502 2.539 2.379 2.610 2.612 2.528 ns
DIFFERENTIAL
GCLK t_co
1.8-V HSTL
CLASS II
16mA _GCLK
PLL ^tco
3.406
1.457
3.676
1.645
5.421 5.617 6.159 6.006 6.383 5.754 6.292 6.142 6.462 ns
2.162 2.256 2.485 2.489 2.526 2.366 2.596 2.598 2.514 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.455
1.506
3.729
1.698
5.492 5.690 6.235 6.082 6.459 5.828 6.368 6.218 6.538 ns
2.233 2.329 2.561 2.565 2.602 2.440 2.672 2.674 2.590 ns
DIFFERENTIAL
1.5-V
6mA
SSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.431
1.482
3.705
1.674
5.474 5.673 6.218 6.065 6.442 5.811 6.353 6.203 6.523 ns
2.215 2.312 2.544 2.548 2.585 2.423 2.657 2.659 2.575 ns
GCLK t_co
8mA _GCLK
PLL ^tco
3.414
1.465
3.686
1.655
5.452 5.651 6.196 6.043 6.420 5.789 6.331 6.181 6.501 ns
2.193 2.290 2.522 2.526 2.563 2.401 2.635 2.637 2.553 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation