EP3SE110F1152I3N Datasheet, PDF (308/341 Pages) Altera Corporation – Stratix III Device Handbook

1–298
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–134. EP3SE260 Row Pins Output Timing Parameters (Part 5 of 5)
I/O
Standard
4mA
1.2-V
HSTL
CLASS I ^6mA
8mA
3.0-V PCI —
3.0-V
PCI-X
—
Clock
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
Fast Model
Industrial Commercial
C2
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.478
3.726 5.501 5.718 6.296 6.118 6.538 5.883 6.420 6.118 6.538 ns
1.379
1.586 2.036 2.128 2.323 2.308 2.266 2.231 2.457 2.308 2.266 ns
3.466
3.714 5.490 5.706 6.284 6.109 6.529 5.872 6.411 6.109 6.529 ns
1.367
1.578 2.027 2.119 2.314 2.296 2.254 2.220 2.448 2.296 2.254 ns
3.463
3.712 5.494 5.711 6.290 6.118 6.538 5.878 6.421 6.118 6.538 ns
1.364
1.578 2.034 2.127 2.323 2.302 2.260 2.226 2.458 2.302 2.260 ns
3.542
3.812 5.520 5.723 6.294 6.113 6.564 5.875 6.437 6.113 6.564 ns
1.476
1.661 2.049 2.137 2.343 2.368 2.264 2.253 2.476 2.368 2.264 ns
3.542
3.812 5.520 5.723 6.294 6.113 6.564 5.875 6.437 6.113 6.564 ns
1.476
1.661 2.049 2.137 2.343 2.368 2.264 2.253 2.476 2.368 2.264 ns
Table 1–135 through Table 1–138 list the maximum I/O timing parameters for
EP3SE260 devices for differential I/O standards.
Table 1–135 lists the EP3SE260 column pins input timing parameters for differential
I/O standards.
Table 1–135. EP3SE260 Column Pins Input Timing Parameters (Part 1 of 3)
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
I/O Standard Clock
Industrial Commercial
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL= ^Units
0.9 V
LVDS
t_su
GCLK
t_h
GCLK ^tsu
PLL _th
MINI-LVDS
t_su
GCLK
t_h
GCLK ^tsu
PLL _th
RSDS
GCLK ^tsu
t_h
GCLK ^tsu
PLL _th
t_su
DIFFERENTIAL ^GCLK
1.2-V HSTL
t_h
CLASS I
GCLK ^tsu
PLL _th
-1.153
1.289
1.103
-0.824
-1.153
1.289
1.103
-0.824
-1.161
1.297
1.095
-0.816
-1.161
1.297
1.095
-0.816
-1.221
1.376
1.122
-0.821
-1.221
1.376
1.122
-0.821
-1.233
1.388
1.110
-0.809
-1.233
1.388
1.110
-0.809
-1.879 -1.911 -2.067 -1.987 -2.459 -1.928 -2.084 -1.987 -2.459 ns
2.114 2.150 2.330 2.237 2.711 2.177 2.355 2.237 2.711 ns
1.882 1.986 2.207 2.099 2.096 1.998 2.217 2.099 2.096 ns
-1.403 -1.493 -1.659 -1.580 -1.562 -1.493 -1.659 -1.580 -1.562 ns
-1.879 -1.911 -2.067 -1.987 -2.459 -1.928 -2.084 -1.987 -2.459 ns
2.114 2.150 2.330 2.237 2.711 2.177 2.355 2.237 2.711 ns
1.882 1.986 2.207 2.099 2.096 1.998 2.217 2.099 2.096 ns
-1.403 -1.493 -1.659 -1.580 -1.562 -1.493 -1.659 -1.580 -1.562 ns
-1.889 -1.922 -2.083 -2.003 -2.475 -1.939 -2.099 -2.003 -2.475 ns
2.124 2.161 2.346 2.253 2.727 2.188 2.370 2.253 2.727 ns
1.872 1.975 2.191 2.083 2.080 1.987 2.202 2.083 2.080 ns
-1.393 -1.482 -1.643 -1.564 -1.546 -1.482 -1.644 -1.564 -1.546 ns
-1.889 -1.922 -2.083 -2.003 -2.475 -1.939 -2.099 -2.003 -2.475 ns
2.124 2.161 2.346 2.253 2.727 2.188 2.370 2.253 2.727 ns
1.872 1.975 2.191 2.083 2.080 1.987 2.202 2.083 2.080 ns
-1.393 -1.482 -1.643 -1.564 -1.546 -1.482 -1.644 -1.564 -1.546 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation