EP3SE110F1152I3N Datasheet, PDF (218/341 Pages) Altera Corporation – Stratix III Device Handbook

1–208
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–103 lists the EP3SE50 column pins output timing parameters for single-ended
I/O standards.
Table 1–103. EP3SE50 Column Pins Output Timing Parameters (Part 1 of 6)
I/O
Standard
Clock
3.3-V
LVTTL
3.3-V
LVCMOS
3.0-V
LVTTL
GCLK t_co
4mA
GCLK
PLL
t_co
GCLK t_co
8mA
GCLK
PLL
t_co
GCLK t_co
12mA
GCLK
PLL
t_co
GCLK t_co
16mA
GCLK
PLL
t_co
GCLK t_co
4mA
GCLK
PLL
t_co
GCLK t_co
8mA
GCLK
PLL
t_co
GCLK t_co
12mA
GCLK
PLL
t_co
GCLK t_co
16mA
GCLK
PLL
t_co
GCLK t_co
4mA
GCLK
PLL
t_co
GCLK t_co
8mA
GCLK
PLL
t_co
GCLK t_co
12mA
GCLK
PLL
t_co
GCLK t_co
16mA
GCLK
PLL
t_co
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.293
3.293 4.559 4.925 5.402 5.282 5.365 4.925 5.402 5.282 5.365 ns
3.550
3.524 4.903 5.329 5.819 5.674 5.973 5.329 5.819 5.674 5.973 ns
3.176
3.176 4.405 4.763 5.232 5.112 5.252 4.763 5.232 5.112 5.252 ns
3.483
3.457 4.794 5.218 5.706 5.561 5.860 5.218 5.706 5.561 5.860 ns
3.081
3.081 4.268 4.620 5.080 4.960 5.162 4.620 5.080 4.960 5.162 ns
3.397
3.371 4.691 5.120 5.614 5.469 5.768 5.120 5.614 5.469 5.768 ns
3.041
3.051 4.243 4.596 5.055 4.935 5.120 4.596 5.055 4.935 5.120 ns
3.390
3.364 4.674 5.092 5.573 5.428 5.727 5.092 5.573 5.428 5.727 ns
3.296
3.296 4.563 4.937 5.416 5.296 5.373 4.937 5.416 5.296 5.373 ns
3.556
3.530 4.908 5.334 5.826 5.681 5.980 5.334 5.826 5.681 5.980 ns
3.096
3.096 4.273 4.625 5.086 4.966 5.172 4.625 5.086 4.966 5.172 ns
3.401
3.375 4.701 5.137 5.625 5.480 5.779 5.137 5.625 5.480 5.779 ns
3.059
3.069 4.236 4.594 5.055 4.935 5.148 4.594 5.055 4.935 5.148 ns
3.408
3.382 4.695 5.116 5.599 5.454 5.753 5.116 5.599 5.454 5.753 ns
3.043
3.053 4.212 4.553 5.025 4.904 5.119 4.553 5.025 4.904 5.119 ns
3.392
3.366 4.672 5.090 5.570 5.425 5.724 5.090 5.570 5.425 5.724 ns
3.238
3.238 4.508 4.876 5.367 5.247 5.356 4.876 5.367 5.247 5.356 ns
3.514
3.488 4.870 5.298 5.786 5.641 5.940 5.298 5.786 5.641 5.940 ns
3.108
3.108 4.339 4.704 5.205 5.086 5.239 4.704 5.205 5.086 5.239 ns
3.403
3.377 4.740 5.164 5.648 5.504 5.801 5.164 5.648 5.504 5.801 ns
3.033
3.033 4.250 4.605 5.103 4.984 5.175 4.605 5.103 4.984 5.175 ns
3.367
3.341 4.677 5.095 5.574 5.430 5.728 5.095 5.574 5.430 5.728 ns
3.000
3.010 4.188 4.536 5.053 4.934 5.152 4.536 5.053 4.934 5.152 ns
3.349
3.323 4.648 5.067 5.546 5.401 5.700 5.067 5.546 5.401 5.700 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation