EP3SE110F1152I3N Datasheet, PDF (300/341 Pages) Altera Corporation – Stratix III Device Handbook

1–290
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–133. EP3SE260 Column Pins Output Timing Parameters (Part 3 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL=
V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
2mA _GCLK
PLL ^tco
3.835
4.278
3.868
4.267
5.701 5.915 6.815 6.353 6.775 5.915 6.815 6.353 6.775 ns
6.336 6.599 7.217 7.045 7.864 6.599 7.217 7.045 7.864 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.654
4.097
3.687
4.086
5.422 5.606 6.354 6.007 6.427 5.606 6.354 6.007 6.427 ns
6.057 6.290 6.870 6.699 7.402 6.290 6.870 6.699 7.402 ns
GCLK t_co 3.572
3.605 5.315 5.491 6.180 5.895 6.317 5.491 6.180 5.895 6.317 ns
6mA _GCLK
PLL ^tco
4.015
4.004 5.950 6.175 6.759 6.587 7.229 6.175 6.759 6.587 7.229 ns
1.8 V
GCLK t_co 3.552
3.585 5.257 5.437 6.068 5.829 6.251 5.437 6.068 5.829 6.251 ns
8mA _GCLK
PLL ^tco
3.995
3.984 5.892 6.121 6.693 6.521 7.117 6.121 6.693 6.521 7.117 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.489
3.932
3.522
3.921
5.196 5.362 5.954 5.748 6.170 5.362 5.954 5.748 6.170 ns
5.831 6.046 6.612 6.440 7.003 6.046 6.612 6.440 7.003 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.471
3.914
3.504
3.903
5.175 5.341 5.916 5.725 6.147 5.341 5.916 5.725 6.147 ns
5.810 6.025 6.589 6.417 6.965 6.025 6.589 6.417 6.965 ns
GCLK t_co
2mA _GCLK
PLL ^tco
3.781
4.224
3.814
4.213
5.630 5.847 6.732 6.291 6.713 5.847 6.732 6.291 6.713 ns
6.265 6.531 7.155 6.983 7.781 6.531 7.155 6.983 7.781 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.569
4.012
3.602
4.001
5.311 5.491 6.176 5.899 6.321 5.491 6.176 5.899 6.321 ns
5.946 6.175 6.763 6.591 7.225 6.175 6.763 6.591 7.225 ns
GCLK t_co 3.544
3.577 5.244 5.431 6.059 5.832 6.254 5.431 6.059 5.832 6.254 ns
6mA _GCLK
PLL ^tco
3.987
3.976 5.879 6.115 6.696 6.524 7.108 6.115 6.696 6.524 7.108 ns
1.5 V
GCLK t_co 3.533
3.566 5.227 5.406 6.027 5.812 6.234 5.406 6.027 5.812 6.234 ns
8mA _GCLK
PLL ^tco
3.976
3.965 5.862 6.090 6.676 6.504 7.076 6.090 6.676 6.504 7.076 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.478
3.921
3.511
3.910
5.189 5.355 5.945 5.742 6.164 5.355 5.945 5.742 6.164 ns
5.824 6.039 6.606 6.434 6.994 6.039 6.606 6.434 6.994 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.473
3.916
3.506
3.905
5.172 5.344 5.903 5.731 6.153 5.344 5.903 5.731 6.153 ns
5.807 6.028 6.595 6.423 6.952 6.028 6.595 6.423 6.952 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation