EP3SE110F1152I3N Datasheet, PDF (327/341 Pages) Altera Corporation – Stratix III Device Handbook

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–317
Table 1–168 and Table 1–169 list the regional clock timing parameters for EP3SL200.
Table 1–168. EP3SL200 Column Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
C3
C4
C4L
Industrial
2.006
2.006
0.059
0.059
Commercial
2.035
2.035
0.086
0.086
V_CCL=
1.1 V
V_CCL=
1.1 V
3.020 3.113
3.020 3.113
-0.150 -0.191
-0.150 -0.191
V_CCL=
1.1 V
3.494
3.494
-0.109
-0.109
V_CCL=
1.1 V
3.213
3.213
-0.094
-0.094
V_CCL=
0.9 V
3.743
3.743
0.116
0.116
I3
V_CCL=
1.1 V
3.113
3.113
-0.191
-0.191
I4
V_CCL=
1.1 V
3.531
3.531
0.291
0.291
I4L
V_CCL=
1.1 V
3.213
3.213
-0.094
-0.094
V_CCL=
0.9 V
3.743
3.743
0.116
0.116
Units
ns
ns
ns
ns
Table 1–169. EP3SL200 Row Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.937
1.855
0.126
0.044
2.065
1.974
0.197
0.106
C2
C3
V_CCL=
1.1 V
V_CCL=
1.1 V
3.000 3.070
2.848 2.910
-0.059 -0.091
-0.211 -0.254
C4
V_CCL=
1.1 V
3.414
3.233
-0.051
-0.232
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.275 3.597
3.104 3.438
-0.036 -0.041
-0.207 -0.200
I3
V_CCL=
1.1 V
3.139
2.971
-0.043
-0.213
I4
V_CCL=
1.1 V
3.479
3.290
0.410
0.221
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.275 3.597
3.104 3.438
-0.036 -0.041
-0.207 -0.200
Units
ns
ns
ns
ns
Table 1–170 and Table 1–171 list the periphery clock timing parameters for EP3SL200
devices.
Table 1–170. EP3SL200 Column Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
C3
C4
C4L
Industrial
1.720
1.720
0.037
0.037
Commercial
1.712
1.712
0.064
0.064
V_CCL=
1.1 V
V_CCL=
1.1 V
2.615 2.776
2.615 2.776
-0.173 -0.213
-0.173 -0.213
V_CCL=
1.1 V
3.177
3.177
-0.135
-0.135
V_CCL=
1.1 V
3.044
3.044
-0.118
-0.118
V_CCL=
0.9 V
3.660
3.660
0.090
0.090
I3
V_CCL=
1.1 V
2.776
2.776
-0.213
-0.213
I4
V_CCL=
1.1 V
3.177
3.177
0.292
0.292
I4L
V_CCL=
1.1 V
3.044
3.044
-0.118
-0.118
V_CCL=
0.9 V
3.660
3.660
0.090
0.090
Units
ns
ns
ns
ns
Table 1–171. EP3SL200 Row Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.501
1.419
0.105
0.023
1.575
1.484
0.174
0.083
C2
C3
V_CCL=
1.1 V
V_CCL=
1.1 V
2.380 2.518
2.225 2.355
-0.081 -0.118
-0.233 -0.281
C4
V_CCL=
1.1 V
2.892
2.711
-0.077
-0.258
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.761 3.077
2.590 2.918
-0.061 -0.063
-0.232 -0.222
I3
V_CCL=
1.1 V
2.567
2.397
-0.067
-0.237
I4
V_CCL=
1.1 V
2.938
2.749
0.411
0.222
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.761 3.077
2.590 2.918
-0.061 -0.063
-0.232 -0.222
Units
ns
ns
ns
ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2