AK4632 Datasheet, PDF (62/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
„ Speaker-amp Output
FS2-0 bits _XXXX
(Addr:05H,
D5, D2-0)
DACM bit
(Addr:02H, D3)
ALC2S bit
(Addr:02H, D5)
(1)
(2)
Example:
PLL, Master Mode
XXXX
Audio I/F Format :DSP Mode, BCKP=MSBS= “0”
Sampling Frequency: 8kHz
Digital Volume: -8dB
(8)
ALC2 : Enable
(1) Addr:05H, Data:00H
(2) Addr:02H, Data:28H
ALC2 bit
(Addr:07H, D6)
DVOL7-0 bits
(Addr:0AH, D7-0)
PMDAC bit
(Addr:00H, D2)
PMSPK bit
(Addr:00H, D4)
SPPS bit
(Addr:02H, D7)
SPP pin
0
(3)
0001100
(4)
(5)
(6)
Hi-Z
X
XXXXXXX
(7)
Normal Output
(9)
Hi-Z
(3) Addr:07H, Data:40H
(4) Addr:0AH, Data:28H
(5) Addr:00H, Data:54H
(6) Addr:02H, Data:A8H
Playback
(7) Addr:02H, Data:28H
SPN pin
Hi-Z
SVDD/2 Normal Output SVDD/2 Hi-Z
(8) Addr:00H, Data:40H
Figure 51. Speaker-Amp Output Sequence
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4632 is PLL mode, DAC and Speaker-Amp should be
powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up the path of “DAC Æ SPK-Amp”
DACM = ALC2S bit: “0” → “1”
(3) Set up the ALC2 Enable/Disable
(4) Set up the digital volume (Addr: 0AH)
After DAC is powered-up, the digital volume changes from default value (0dB) to the register setting value by
the soft transition.
(5) Power Up of DAC and Speaker-Amp: PMDAC bit = PMSPK bit = “0” → “1”
When ALC2 bit = “1”, the ALC2 is disabled (ALC2 gain is fiexed to “–2dB”) during the initilization cycle
(512/fs = 64ms @ fs=8kHz, ROTM bit = “0”) and the ALC2 starts from “–2dB” after completing the
initilization cycle.
(6) Exit the power-save-mode of Speaker-Amp: SPPS bit = “0” → “1”
“(6)” time depends on the time constant of input impedance of MIN pin and capacitor between MIN pin and
MOUT pin. If Speaker-Amp output is enabled before MIN-Amp (ALC2) becomes stable, pop noise may occur.
e.g. Input Impedance of MIN pin =36kΩ (max), C=0.1µF: Recommended wait time is more than 5τ = 18ms.
(7) Enter the power-save-mode of Speaker-Amp: SPPS bit = “1” → “0”
(8) Disable the path of “DAC Æ SPK-Amp”
DACM = ALC2S bit: “1” → “0”
(9) Power Down DAC and Speaker-Amp: PMDAC bit = PMSPK bit = “1” → “0”
MS0396-E-00
- 62 -
2005/06