AK4632 Datasheet, PDF (11/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
SWITING CHARACTERISTICS
(Ta = 25°C; AVDD, DVDD = 2.6 ∼ 3.6V; SVDD =2.6 ∼ 5.25V ; VVDD =2.8 ∼ 5.25V; C_L=20pF)
Parameter
Symbol
min
typ
max
PLL Master Mode (PLL Reference Clock = MCKI pin) (Figure 3)
MCKI Input: Frequency
fCLK
11.2896
-
27.0
Pulse Width Low
tCLKL
0.4/fCLK
-
-
Pulse Width High
tCLKH
0.4/fCLK
-
-
MCKO Output:
Frequency
fMCK
-
256 x fFCK
-
Duty Cycle except fs=29.4kHz, 32kHz
dMCK
40
50
60
fs=29.4kHz, 32kHz (Note 30) dMCK
-
33
-
FCK Output: Frequency
fFCK
8
-
48
Duty Cycle
dFCK
-
50
-
BICK: Period (BCKO1-0 = “00”)
(BCKO1-0 = “01”)
(BCKO1-0 = “10”)
tBCK
-
1/16fFCK
-
tBCK
-
1/32fFCK
-
tBCK
-
1/64fFCK
-
Duty Cycle
dBCK
-
50
-
Audio Interface Timing
DSP Mode: (Figure 4, Figure 5)
FCK “↑” to BICK “↑” (Note 31)
FCK “↑” to BICK “↓” (Note 32)
BICK “↑” to SDTO (BCKP = “0”)
BICK “↓” to SDTO (BCKP = “1”)
tDBF
tDBF
tBSD
tBSD
0.5 x tBCK -40
0.5 x tBCK -40
-70
-70
0.5 x tBCK
0.5 x tBCK
-
-
0.5 x tBCK + 40
0.5 x tBCK +40
70
70
SDTI Hold Time
tSDH
50
-
-
SDTI Setup Time
tSDS
50
-
-
Except DSP Mode: (Figure 6)
BICK “↓” to FCK Edge
tBFCK
-40
-
40
FCK to SDTO (MSB)
tFSD
-70
-
70
(Except I²S mode)
BICK “↓” to SDTO
tBSD
-70
-
70
SDTI Hold Time
tSDH
50
-
-
SDTI Setup Time
tSDS
50
-
-
Units
MHz
ns
ns
kHz
%
%
kHz
%
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0396-E-00
- 11 -
2005/06