AK4632 Datasheet, PDF (48/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
AOPSN: Mono Line Output Power-Save Mode
0: Normal Operation
1: Power-Save Mode (Default)
Power-save mode is enable at AOPSN bit = “1”. POP noise at power-up/down can be reduced by changing
at AOPSN bit = “1”. (See Figure 34)
Addr
04H
Register Name
Mode Control 1
Default
D7
PLL3
0
D6
PLL2
0
D5
PLL1
0
D4
PLL0
0
D3
BCKO1
0
D2
BCKO0
0
D1
DIF1
1
D0
DIF0
0
DIF1-0: Audio Interface Format (See Table 28)
Mode
0
1
2
3
DIF1 bit
0
0
1
1
DIF0 bit
0
1
0
1
SDTO (ADC) SDTI (DAC) BICK
DSP Mode
DSP Mode
≥ 16fs
MSB justified LSB justified ≥ 32fs
MSB justified MSB justified
I²S compatible I²S compatible
≥ 32fs
≥ 32fs
Table 28. Audio Interface Format
Figure
See Table 34
Figure 27
Figure 28
Figure 29
Default
BCKO1-0: Select BICK output frequency at Master Mode (See Table 29)
Mode
0
1
2
3
BCKO1 bit BCKO0 bit
BICK Output
Frequency
0
0
16fs
0
1
32fs
1
0
64fs
1
1
N/A
Table 29. BICK Output Frequency at Master Mode
Default
PLL3-0: Select input frequency at PLL mode (See Table 30)
Mode
0
1
2
3
4
5
6
7
12
13
Others
PLL3
bit
0
0
0
0
0
0
0
0
1
1
PLL2 PLL1 PLL0 PLL Reference
Input
bit
bit
bit Clock Input Pin Frequency
0
0
0
FCK pin
1fs
0
0
1
BICK pin
16fs
0
1
0
BICK pin
32fs
0
1
1
BICK pin
64fs
1
0
0
MCKI pin 11.2896MHz
1
0
1
MCKI pin
12.288MHz
1
1
0
MCKI pin
12MHz
1
1
1
MCKI pin
24MHz
1
0
0
MCKI pin
13.5MHz
1
0
1
MCKI pin
27MHz
Others
N/A
Table 30. Setting of PLL Mode (*fs: Sampling Frequency)
Default
MS0396-E-00
- 48 -
2005/06