AK4632 Datasheet, PDF (42/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
VGCA4-0 bits
GAIN(dB)
17H
+10.5dB
16H
+10.0dB
15H
+9.5dB
:
:
04H
+1.0dB
03H
+0.5dB
02H
0.0dB
01H
-0.5dB
00H
-1.0dB
Table 25. Setting of GCA
STEP
0.5dB
Default
„ Serial Control Interface
Internal registers may be written by using the 3-wire µP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of a 2-bit Chip address (Fixed to “10”), Read/Write (Fixed to “1”), Register address (MSB first, 5bits) and
Control data (MSB first, 8bits). Address and data is clocked in on the rising edge of CCLK and data is clocked out on the
falling edge. The clock speed of CCLK is 5MHz (max). The value of internal registers is initialized at PDN pin = “L”.
CSN
CCLK
CDTI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C1 C0 R/W A4 A3 A2 A2 A0 D7 D6 D5 D4 D3 D2 D1 D0
“1” “0” “1”
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (C1 = “1”, C0 = “0”); Fixed to “10”
READ/WRITE (“1”: WRITE, “0”: READ); Fixed to “1”
Register Address
Control data
Figure 43. Serial Control I/F Timing
MS0396-E-00
- 42 -
2005/06