AK4632 Datasheet, PDF (24/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
„ PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
When an external clock (11.2896MHz, 12MHz , 12.288MHz, 13.5MHz, 24MHz or 27MHz) is input to MCKI pin, the
MCKO, BICK and FCK clocks are generated by an internal PLL circuit. The MCKO output frequency is fixed to 256fs,
the output is enabled by MCKO bit. The BICK is selected among 16fs, 32fs or 64fs, by BCKO1-0 bits. (See Table 9)
When BICK output frequency is 16fs, the audio interface format supports only Mode 0 (DSP Mode).
AK4632
11.2896MHz, 12MHz, 12.288MHz
13.5MHz, 24MHz, 27MHz
DSP or µP
MCKI
MCKO
BICK
FCK
SDTO
SDTI
256fs
16fs, 32fs, 64fs
1fs
MCLK
BCLK
FCK
SDTI
SDTO
Mode
0
1
2
3
Figure 19. PLL Master Mode
BCKO1
BCKO0
BICK Output
Frequency
0
0
16fs
0
1
32fs
1
0
64fs
1
1
N/A
Table 9. BICK Output Frequency at Master Mode
Default
MS0396-E-00
- 24 -
2005/06