AK4632 Datasheet, PDF (14/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
„ Timing Diagram
MCKI
FCK
MCKO
1/fCLK
tCLKH
tCLKL
1/fFCK
dFCK
dFCK
1/fMCK
tMCKOH
tMCKOL
dMCK = tMCKOL x fMCK x 100
Figure 3. Clock Timing (PLL Master mode)
VIH
VIL
50%DVDD
50%DVDD
FCK
BICK
(BCKP = "0")
tDBF
tBCK
dBCK
50%DVDD
50%DVDD
BICK
(BCKP = "1")
tBSD
50%DVDD
SDTO
MSB
50%DVDD
tSDS tSDH
SDTI
VIH
MSB
VIL
Figure 4. Audio Interface Timing (PLL Master mode & DSP mode: MSBS = “0”)
MS0396-E-00
- 14 -
2005/06