AK4632 Datasheet, PDF (53/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
Addr
09H
Register Name
Input PGA Control
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
IPGA6 IPGA5 IPGA4 IPGA3 IPGA2 IPGA1 IPGA0
0
0
0
1
0
0
0
0
IPGA6-0: Input Analog PGA (See Table 42)
Default: “10H” (0dB)
When IPGA gain is changed, IPGA6-0 bits should be written while PMMIC bit is “1” and ALC1 bit is “0”.
IPGA6-0 bits should be set at 2/fs(250µs@fs=8kHz) after PMMIC bit is set to “1”. IPGA gain is reset when
PMMIC bit is “0”, and then IPGA operation starts from the default value when PMMIC bit is changed to “1”.
When ALC1 bit is changed from “1” to “0”, IPGA holds the last gain value set automatically by ALC1
operation.
In a manual mode, IPGA can be set to any values in Table 42.The ZTM1-0 bits set zero crossing timeout
period when IPGA value is changed. When the control register is written from the µP, the zero crossing
counter is reset and its counter starts. When the signal zero crossing or zero crossing timeout, the written value
from the µP becomes valid.
DATA (HEX) GAIN (dB)
STEP
47
+27.5
46
+27.0
45
+26.5
:
:
36
+19.0
:
:
10
+0.0
:
:
0.5dB
06
−5.0
05
−5.5
04
−6.0
03
−6.5
02
−7.0
01
−7.5
00
−8.0
Table 42. Input Gain Setting
Default
Addr
0AH
Register Name
Digital Volume Control
Default
D7
DVOL7
0
D6
DVOL6
0
D5
DVOL5
0
D4
DVOL4
1
D3
DVOL3
1
D2
DVOL2
0
D1
DVOL1
0
D0
DVOL0
0
DVOL7-0: Output Digital Volume (See Table 43)
The AK4632 has a digital output volume (256 levels, 0.5dB step, Mute). The gain can be set by the DVOL7-0
bits. The volume is included in front of a DAC block, a input data of DAC is changed from +12 to –115dB
with MUTE. This volume has a soft transition function. It takes 1061/fs (=133ms @ fs = 8kHz) or 256/fs
(=32ms @ fs = 8kHz) from 00H to FFH. Soft Transition Time is set by DVTM bit.
DVOL7-0
Gain
00H
+12.0dB
01H
+11.5dB
02H
+11.0dB
•
•
18H
0dB
•
•
FDH
−114.5dB
FEH
−115.0dB
FFH
MUTE (−∞)
Table 43. Digital Volume Code Table
Default
MS0396-E-00
- 53 -
2005/06