AK4632 Datasheet, PDF (61/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
„ MIC Input Recording
FS3-0 bits
(Addr:05H,
D5,D2-0)
XXXX
(1)
MIC Control
(Addr:02H, D2-0)
ALC1 Control 1
(Addr:06H)
ALC1 Control 2
(Addr:08H)
001
(2)
XXH
(3)
XXH
(4)
ALC1 Control 3
(Addr:07H)
ALC1 State
XXH
(5)
ALC1 Disable
XXX
X1X
00H
47H
Example:
PLL Master Mode
Audio I/F Format:DSP Mode, BCKP=MSBS=“0”
Sampling Frequency:8kHz
Pre MIC AMP:+20dB
MIC Power On
ALC1 setting:Refer to Figrure 29
ALC2 bit=“1”(default)
(1) Addr:05H, Data:00H
(2) Addr:02H, Data:07H
(3) Addr:06H, Data:00H
61H or 21H
ALC1 Enable ALC1 Disable
(4) Addr:08H, Data:47H
(5) Addr:07H, Data:61H
PMADC bit
(Addr:00H, D0)
PMMIC bit
(Addr:00H, D1)
ADC Internal
State
(6)
(7)
1059 / fs
Power Down
Initialize Normal State Power Down
(6) Addr:00H, Data:43H
Recording
(7) Addr:00H, Data:40H
Figure 50. MIC Input Recording Sequence
<Example>
This sequence is an example of ALC1 setting at s=8kHz. If the parameter of the ALC1 is changed, please refer to
“Figure 31. Registers set-up sequence at the ALC1 operation“
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bit). When the AK4632 is PLL mode, MIC and ADC should be powered-up
in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up MIC input (Addr: 02H)
(3) Set up Timer Select for ALC1 (Addr: 06H)
(4) Set up REF value for ALC1 (Addr: 08H)
(5) Set up LMTH, RATT, LMAT1-0 and ALC1 bits (Addr: 07H)
(6) Power Up MIC and ADC: PMMIC bit = PMADC bit = “0” → “1”
The initialization cycle time of ADC is 1059/fs=133ms@fs=8kHz.
After the ALC1 bit is set to “1” and MIC block is powered-up, the ALC1 operation starts from IPGA default
value (0dB).
(7) Power Down MIC and ADC: PMMIC bit = PMADC bit = “1” → “0”
When the registers for the ALC1 operation are not changed, ALC1 bit may be keeping “1”. The ALC1 operation
is disabled because the MIC block is powered-down. If the registers for the ALC1 operation are also changed
when the sampling frequency is changed, it should be done after the AK4632 goes to the manual mode (ALC1 bit
= “0”) or MIC block is powered-down (PMMIC bit = “0”). IPGA gain is reset when PMMIC bit is “0”, and then
IPGA operation starts from the default value when PMMIC bit is changed to “1”.
MS0396-E-00
- 61 -
2005/06