AK4632 Datasheet, PDF (52/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
ALC1: ALC1 Enable
0: ALC1 Disable (Default)
1: ALC1 Enable
When ALC1 bit is “1”, the ALC1 operation is enabled.
ALC2: ALC2 Enable
0: ALC2 Disable
1: ALC2 Enable (Default)
After completing the initializing cycle (512/fs = 64ms @fs=8kHz at ROTM bit = “0”), the ALC2 operation is
enabled. When the PMSPK bit changes from “0” to “1” or PDN pin changes from “L” to “H”, the initilization
cycle starts.
Addr
08H
Register Name
ALC Mode Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
REF6 REF5 REF4 REF3 REF2 REF1 REF0
0
0
1
1
0
1
1
0
REF6-0: Reference value at ALC1 Recovery Operation (See Table 41)
During the ALC1 recovery operation, if the IPGA value exceeds the setting reference value by gain operation,
then the IPGA does not become larger than the reference value. For example, when REF7-0 = “30H”, RATT =
2step, IPGA = 2FH, even if the input signal does not exceed the “ALC1 Recovery Waiting Counter Reset
Level”, the IPGA does not change to 2FH + 2step = 31H, and keeps 30H. Default is “36H”.
DATA (HEX) GAIN (dB)
STEP
47
+27.5
46
+27.0
45
+26.5
:
:
36
+19.0
Default
:
:
10
+0.0
:
:
0.5dB
06
−5.0
05
−5.5
04
−6.0
03
−6.5
02
−7.0
01
−7.5
00
−8.0
Table 41. Setting Reference Value at ALC1 Recovery Operation
MS0396-E-00
- 52 -
2005/06