AK4632 Datasheet, PDF (56/70 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono CODEC with ALC & MIC/SPK/Video-AMP

ASAHI KASEI
[AK4632]
1. Grounding and Power Supply Decoupling
The AK4632 requires careful attention to power supply and grounding arrangements. AVDD, DVDD, SVDD and VVDD
are usually supplied from the system’s analog supply. If AVDD, DVDD, SVDD and VVDD are supplied separately, the
correct power up sequence should be observed. AVSS, DVSS and SVSS of the AK4632 should be connected to the
analog ground plane. System analog ground and digital ground should be connected together near to where the supplies
are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4632 as possible, with the
small value ceramic capacitor being the nearest.
2. Voltage Reference
VCOM is a signal ground of this chip. A 2.2µF electrolytic capacitor in parallel with a 0.1µF ceramic capacitor attached
to the VCOM pin eliminates the effects of high frequency noise. No load current may be drawn from the VCOM pin. All
signals, especially clocks, should be kept away from the VCOM pin in order to avoid unwanted coupling into the
AK4632.
3. Analog Inputs
The Mic and Beep inputs are single-ended. The input signal range scales with nominally at 0.06 x AVDD Vpp for the Mic
input and 0.6 x AVDD Vpp for the Beep input, centered around the internal common voltage (approx. 0.45 x AVDD).
Usually the input signal is AC coupled using a capacitor. The cut-off frequency is fc = (1/2πRC). The AK4632 can accept
input voltages from AVSS to AVDD.
4. Analog Outputs
The input data format for the DAC is 2’s complement. The output voltage is a positive full scale for 7FFFH(@16bit) and
a negative full scale for 8000H(@16bit). Mono output from the MOUT pin and Mono Line Output from the AOUT pin
are centered at 0.45 x AVDD (typ). The Speaker-Amp output is centered at SVDD/2.
MS0396-E-00
- 56 -
2005/06