Z8S18020FSC Datasheet, PDF (32/70 Pages) Zilog, Inc. – ENHANCED Z180 MICROPROCESSOR

Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
T₁
T₂
T_W
ø
49
E
(Memory Read//Write)
49
E
(I/O Read)
49
E
(I/O Write)
D₀ - D₇
T_W
T₃
50
50
50
15
16
Figure 24. E Clock Timing
(Memory Read/Write Cycle, I/O Read/Write Cycle)
ø
E
49
50
BUS RELEASE mode
SLEEP mode
SYSTEM STOP mode
Figure 25. E Clock Timing
(BUS RELEASE Mode, SLEEP Mode, SYSTEM STOP Mode)
T₂
E
Example
I/O read
→ Opcode fetch
T_W
T₃
50
49
51
T₁
50 ₅₂
54
T₂
49
53
53
54
Figure 26. E Clock Timing
(Minimum timing example of P_WEL and P_WEH)
Zilog
1-32
PRELIMINARY
DS971800401