Z8S18020FSC Datasheet, PDF (15/70 Pages) Zilog, Inc. – ENHANCED Z180 MICROPROCESSOR

Zilog
Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
T₁ T₂ T₃ T₁ T₂ T₃ T_I T_I T_I T₁ T₂ T₃ T_I T₁ T₂ T₃ T_I
φ
A₀-A₁₈ (A₁₉)
PC
PC+1
1
PC
PC+1
D₀-D₇
EDH
4DH
EDH
4DH
M1
MREQ
RD
ST
Figure 9. RETI Instruction Sequence with MIE=0
Machine
Cycle States
1 T1-T3
2 T1-T3
Ti
Ti
Ti
3 T1-T3
Ti
4 T1-T3
5 T1-T3
6 T1-T3
Table 4. RETI Control Signal States with MIE=0
Address
1st Opcode
2nd Opcode
NA
NA
NA
1st Opcode
NA
2nd Opcode
SP
SP+1
Data
EDH
4DH
Tri-State
Tri-State
Tri-State
EDH
Tri-State
4DH
Data
Data
M1
RD WR MREQ IORQ IOC=1 IOC=0 HALT ST
0
1
0
1
0
1
1
0
0
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
0
1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
1
1
0
1
0
1
1
1
1
1
0
1
0
1
1
1
1
1
M1TE (M1 Temporary Enable). This bit controls the tem-
porary assertion of the /M1 signal. It is always read back
as a 1 and is set to 1 during reset.
When M1E is set to 0 to accommodate certain external
Z80 peripheral(s), those same device(s) may require a
pulse on M1 after programming certain of their registers to
complete the function being programmed.
For example, when a control word is written to the Z80 PIO
to enable interrupts, no enable actually takes place until
the PIO sees an active M1 signal. When M1TE=1, there is
no change in the operation of the /M1 signal and M1E con-
trols its function. When M1TE=0, the M1 output will be as-
serted during the next opcode fetch cycle regardless of the
state programmed into the M1E bit. This is only momen-
tary (one time) and the user need not preprogram a 1 to
disable the function (see Figure10).
DS971800401
PRELIMINARY
1-15