MDS213 Datasheet, PDF (99/120 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps + 1Gbps Ethernet Switch

Type = BMCT (12bits)
31
CPUIRDAT0
MDS213
Data Sheet
12 11
0
BM[11:0]
Bit [11:0] BM
Bit [31:12] Reserved
Type = FCB (56 bits)
31
CPUIRDAT0
CPUIRDAT1
Buffer Management control FIFO Output
BM stores free FCB handles. (FCB handle=0 cannot be used.)
24 23
0
FCB_DATA[31:0]
FCB_DATA[55:32]
Bit [55:0] FCB
Type = QCNT (79 bits)
31
CPUIRDAT0 ^WrPt[5:0]
ECnt[10:0]
CPUIRDAT1
Cache Queue Entry[16:0]
CPUIRDAT2
Frame Control Block.
Refer to Chapter 9 for detailed data structure.
15 14 13
CV
Base[11:0]
RdPt[9:0]
Cache Queue Entry[31:17]
432
0
QS[2:0]
WrPT[9:6]
Bit [2:0] Que_S [2:0]
Bit [14:3] Base [11:0]
Bit [25:15] ECnt [10:0]
Bit [35:26] WrPt [9:0]
Bit [45:36] RdPt [9:0]
Bit[46]
CV
Bit[78:47] QE[31:0]
Queue size
000=128 entries 001=128*2 entries
111=128*8=1K entries
Each entry contains 4 bytes
Base pointer to its Transmission Queue
Entry Count: Total entries in its queue.
Write Pointer
Address_Write_Entry[20:9]=Base[11:0]+WrPt[9:7]
Address_Write_Entry[9:3]= WrPt[6:0]
Address_Write_Entry[2:0]= 0
(The address [2:0] is always equal to 0.)
Read Pointer
Address_Read_Entry[20:9]=Base[11:0]+RdPt[9:7]
Address_Read_Entry[9:3]= RdPt[6:0]
Address_Read_Entry[2:0]= 0 (The address [2:0] is always equal to 0.)
Cache Valid
CV=1, Cache of Queue Entry QE[31:0] is valid.
Cache a queue entry
99
Zarlink Semiconductor Inc.