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MDS213 Datasheet, PDF (75/120 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps + 1Gbps Ethernet Switch
MDS213
Data Sheet
Bit [27:23] Count
Bit [31:28] BE [3:0]
Must be 00001
Byte lane enables
18.2.3.3 Address Registers For Burst Cycle
Two 32-bit burst size registers share a common format
• MWARB
Memory Address Register - Burst Write (in D-words) - Maximum 8 D-words
• Address: h788
• MRARB
Memory Address Register - Burst Read (in D-words) - Maximum 8 D-words
• Address: h78C
Access: Zero-Wait-State,
via FIFO,
Write
31
28 27
24 23 22 21 20
321 0
Count I/E
Address MA[20:2]
SPLK
Bit [0]
LK
Lock Flag
LK=0 Unlock
LK=1 Lock
Bit [1]
SP
Swap Byte Order
Bit [2]
Reserved
Bit [20:2] MA [20:2]
Buffer memory address Bit [20:2] - (Bit [1:0] = 00)
Bit [21] Reserved
Bit [22] I/E
Indicate the Address is Internal or External memory
I/E=0 Internal memory I/E=1 External memory
Bit [27:23] Count
Count = Burst Size in double words Burst size for internal memory is up to
8 D-words. Burst size for external memory is up to 16-Dwords
00001 = 1 D-word, ……01000 = 8 D-word
01111 = 15 D-word 10000= 16 D-word
Valid value range for internal memory is {1 to 8}
Valid value range for external memory is {1 to 16}
Caution: When setting Count = 16, the Starting address has to be in the Q-word boundary. That is MA[2]=0.
Bit [31:28]
Reserved
75
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