MDS213 Datasheet, PDF (11/120 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps + 1Gbps Ethernet Switch

MDS213
1.0 Ball Signal Descriptions and Assignments
Data Sheet
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
A AGND L_A2 L_A1 L_A1 L_A8 L_A4 X_D X_D X_D X_D X_D X_D X_D X_D X_DC X_DI X_DI X_DI X_DI X_DI X_DI X_DI X_DI P_CS P_REP_GN
091
O29 O25 O20 O16 O13 O8 O5 O2 LKO 29 25 21 17 12 8 4 2 I# Q1 TC
B Reser Rese L_A1 L_A1 L_A1 L_A5 X_D X_D X_D X_D X_D X_D X_D X_D X_FC X_DI X_DI X_DI X_DI X_DI X_DI X_DI X_DC Rese NC NC
ved rved 8 4 0
O30 O26 O21 O18 O14 O10 O4 O3 O 28 23 20 16 11 7 3 LKI rved
C AVDD Rese Rese L_A1 L_A1 L_A6 X_D X_D X_D X_D X_D X_D X_D X_D X_DI X_DI X_DI X_DI X_DI X_DI X_DI X_DN Rese P_REP_BR P_BL
rved rved 7 3
O31 O28 O24 O19 O15 O12 O6 O1 31 27 22 18 14 10 6 I rved QC DY AST
D L_D4 L_D1 L_CL NC L_A1 L_A1 L_A7 L_A3 X_D X_D X_D X_D X_D X_DE X_DI X_DI X_DI X_DI X_DI X_DI X_DI X_FC P_IN P_RDP_RS P_A8
K
62
O27 O23 O17 O11 O7 NO 30 24 19 15 9 5 1 I T Y# T#
E L_D6 L_D5 L_D2 L_D0 GND L_A1 VCC L_A9 VDD _X_D VCC X_D GND X_D X_DI VCC X_DI VDD X_DI VCC P_G GND P_AD P_A1 P_CL P_A7
5
O22
O9
O0 26
13
0
NT1
S# 0 K
F L_D11 L_D1 L_D8 L_D3 T_M
0
ODE
#
P_R P_A9 P_A4 P_A3 P_A2
WC#
G L_D1 L_D1 L_D1 L_D7 VCC
5 43
VCC P_A6 P_D3 P_D3 P_D2
109
H L_D2 L_D1 L_D1 L_D1 L_D9
0 862
P_A5 P_A1 P_D2 P_D2 P_D2
864
J L_D2 L_D2 L_D2 L_D1 VDD
4 317
VDD P_D2 P_D2 P_D2 P_D2
7310
K L_D2 L_D2 L_D2 L_D2 L_D1
9 7629
P_D2 P_D2 P_D1 P_D1 P_D1
52986
L L_WE L_D3 L_D3 L_D2 VCC
O# 1 0 8
GND GND GND GND GND GND
VCC P_D1 P_D1 P_D1 P_D1
7432
M L_BW L_OE L_W L_OE L_D2
0# 0# E1# 1# 5
GND GND GND GND GND GND
P_D1 P_D1 P_D1 P_D9 P_D8
501
N L_BW L_AD L_B L_B S_CL
3# S# W2# W1# K
GND GND GND GND GND GND
VDD P_D7 P_D6 P_D4 P_D5
P L_BW L_B L_B L_B VDD
5 W4 W7 W6
GND GND GND GND GND GND
P_D0 T_D0 P_D1 P_D3 P_D2
R L_D3 L_D3 L_D3 L_D3 L_D3
3 4652
GND GND GND GND GND GND
T_D1 T_D4 T_D3 T_D2 T_D1
0
T L_D3 L_D3 L_D3 L_D4 VCC
7 891
GND GND GND GND GND GND
VCC T_D9 T_D7 T_D6 T_D5
U L_D4 L_D4 L_D4 L_D4 L_D4
0 2367
T_D2 T_D1 T_D1 T_D1 T_D8
0521
V L_D4 L_D4 L_D4 L_D5 VDD
4 581
VDD T_D1 T_D1 T_D1 T_D1
9643
W L_D4 L_D5 L_D5 L_D5 L_D5
9 0267
PM_ T_D2 T_D2 T_D1 T_D1
DO[1] 5 1 8 7
Y L_D5 L_D5 L_D5 L_D6
3 4 5 1 VCC
VCC PM_ T_D2 T_D2 T_D2
DEN 4 3 2
O
AA L_D5 L_D5 L_D6 M_CLM0_T
8 9 0 KI XD0
M12_ LE_# PM_ PM_ PM_
RXD5 SYN DI[1] DI[0] DENI
CI
AB L_D6 L_D6 M0_TM0_C
M2_L
M3_
M5_L
M6_T M8_T
M9_T
M10_
M11_
M12_
M_M LE_# LE_S PM_
2 3 XEN RS_D GND NK VCC CRS VDD NK VCC XD1 XD0 GND XD1 VCC RXD1 VDD TXD0 VCC TXER GND DC CLK YNC DO[0]
V
_DV
OO
AC M0_L M0_TM0_RM1_T M2_T M2_ M3_T M4_L M4_ M5_T M6_T M7_L M7_CM8_RM9_T M10_ M10_ M11_ M12_ M12_ M12_ M12_ M12_ M_M LE_D LE_D
NK XD1 XD1 XEN XD1 RXD XD1 NK RXD XD0 XEN NK RS_D XD1 XEN TXENRXD0RXD1TXD0 TXD3 TXD6 RXE RXD4 DIO I O
1
1
V
R
AD NC M0_RM1_T M2_TM2_CM3_TM4_T M4_ M5_T M5_ M6_CM7_TM7_RM8_CM9_TM9_R M10_ M11- M11_ M12_ M12_ M12_ M12_ M12_ M12_ M12_
XD0 XD1 XEN RS_D XD0 XEN CRS XD1 RXD RS_D XEN XD1 RS_D XD0 XD0 TXD0TXENRXD0 LNK TXD2 TXD7 RXD RXD3RXCLRXD0
V
_DV
0V
V
V
K
AE NC M1_L M1_RM2_T M3_L M3_ M4_T M4_ M5_ M6_LM6_RM7_T M8_L M8_T M9_L M9_R M10_ M11_ M11_ M12_ M12_ M12_ M12_ M12_ NC M12_
NK XD0 XD0 NK RXD XD1 RXD CRS NK XD1 XD1 NK XEN NK XD1 TXD1 LNK CRS_TXCL TXD1 TXD5TXENRXD7
RXD1
1
0 _DV
DV K
AF M1_T M1_CM1_RM2_RM3_T M3_ M4_TM5_T M5_ M6_TM6_RM7_TM7_RM8_TM8_RM9_C M10_ M10_ M11_ M12_ M12_ M12_ GREF M12_ NC M12_
XD0 RS_ XD1 XD0 XEN RXD XD0 XEN RXD XD0 XD0 XD0 XD0 XD1 XD0 RS_ LNK CRS_TXD1 CRS COL TXD4 _CLK RXD6
RXD2
DV
0
1
DV
DV
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
VCC = 3.3VDC for I/O (16 balls)
VDD = 2.5VDC for core logic (10 balls)
GND = Digital Ground for both VCC and VDD (42 balls)
AVDD = 2.5VDC for Analog PLL (1 ball)
AGND = Isolated Analog Ground for AVDD (1 ball)
NC
= No Connection
Reserved = Do Not Connect
11
Zarlink Semiconductor Inc.