DS893 Datasheet, PDF (68/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Integrated Interface Block for Interlaken
More information and documentation on solutions using the integrated interface block for Interlaken can
be found at UltraScale Interlaken. The UltraScale Architecture and Product Overview (DS890) lists the
Virtex UltraScale FPGAs that include this block.
Table 80: Maximum Performance for Interlaken Designs
Symbol
Description
Speed Grades and V_CCINT Operating Voltages
1.0V
0.95V
-3
-1H
-2
-1
Unit
s
F_{RX_SERDES_CLK}
Receive serializer/
deserializer clock
402.84
402.84
402.84
195.32
MHz
F_{TX_SERDES_CLK}
Transmit serializer/
deserializer clock
402.84
402.84
402.84
195.32
MHz
F_{DRP_CLK}
Dynamic
reconfiguration
port clock
250.00
250.00
250.00
250.00
MHz
F_{CORE_CLK}
Min
300.00⁽¹⁾
Interlaken core clock _412.50(2)
Max
429.69
Min
300.00⁽¹⁾
412.50⁽²⁾
Max
429.69
Min
Max Min Max
300.00⁽¹⁾
412.50^{(2) 429.69 300.00 322.27}
MHz
F_{LBUS_CLK}
Interlaken local bus
clock
300.00 349.52 300.00 349.52 300.00 349.52 300.00 322.27 MHz
Notes:
1. The minimum value for CORE_CLK is 300 MHz for the 12 x 12.5G Interlaken configuration.
2. The minimum value for CORE_CLK is 412.5 MHz for the 6 x 25.78125G Interlaken configuration. This 6 x 25.78125G
configuration is not supported in the lane logic-only mode.
Integrated Interface Block for 100G Ethernet MAC and PCS
More information and documentation on solutions using the integrated 100 Gb/s Ethernet block can be
found at UltraScale Integrated 100G Ethernet MAC/PCS.
Table 81: Maximum Performance for 100G Ethernet Designs
Symbol
Description
Speed Grades and
V_CCINT Operating Voltages
1.0V
0.95V
-3
-1H
-2
-1
F_{TX_CLK}
F_{RX_CLK}
F_{RX_SERDES_CLK}
F_{DRP_CLK}
Transmit clock
Receive clock
Receive serializer/deserializer clock
Dynamic reconfiguration port clock
322.27
322.27
322.27
250.00
322.27
322.27
322.27
250.00
322.27
322.27
322.27
250.00
322.27
322.27
322.27
250.00
Units
MHz
MHz
MHz
MHz
DS893 (v1.7.1) April 4, 2016
Product Specification
www.xilinx.com
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