DS893 Datasheet, PDF (25/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Table 28: IOB High Performance (HP) Switching Characteristics
I/O Standards
T_{INBUF_DELAY_PAD_I}
1.0V
0.95V
T_{OUTBUF_DELAY_O_PAD}
1.0V
0.95V
-3 -1H -2 -1 -3 -1H -2 -1
DIFF_HSTL_I_12_F
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_HSTL_I_12_M
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSTL_I_12_S
0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
DIFF_HSTL_I_18_F
0.43 0.48 0.48 0.55 0.45 0.49 0.49 0.53
DIFF_HSTL_I_18_M
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.59
DIFF_HSTL_I_18_S
0.43 0.48 0.48 0.55 0.56 0.62 0.62 0.67
DIFF_HSTL_I_DCI_12_F 0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_HSTL_I_DCI_12_M 0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSTL_I_DCI_12_S 0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
DIFF_HSTL_I_DCI_18_F 0.43 0.48 0.48 0.55 0.45 0.49 0.49 0.53
DIFF_HSTL_I_DCI_18_M 0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.59
DIFF_HSTL_I_DCI_18_S 0.43 0.48 0.48 0.55 0.56 0.62 0.62 0.67
DIFF_HSTL_I_DCI_F
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_HSTL_I_DCI_M
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSTL_I_DCI_S
0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
DIFF_HSTL_I_F
DIFF_HSTL_I_M
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSTL_I_S
DIFF_HSUL_12_DCI_F
0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_HSUL_12_DCI_M 0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSUL_12_DCI_S 0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
DIFF_HSUL_12_F
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_HSUL_12_M
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
DIFF_HSUL_12_S
0.43 0.48 0.48 0.55 0.56 0.61 0.61 0.67
DIFF_POD10_DCI_F
DIFF_POD10_DCI_M
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.55
0.43 0.48 0.48 0.55 0.52 0.58 0.58 0.63
DIFF_POD10_DCI_S
DIFF_POD10_F
0.43 0.48 0.48 0.55 0.61 0.68 0.68 0.74
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.55
DIFF_POD10_M
0.43 0.48 0.48 0.55 0.52 0.58 0.58 0.63
DIFF_POD10_S
0.43 0.48 0.48 0.55 0.61 0.68 0.68 0.74
DIFF_POD12_DCI_F
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.55
DIFF_POD12_DCI_M
0.43 0.48 0.48 0.55 0.52 0.58 0.58 0.63
DIFF_POD12_DCI_S
0.43 0.48 0.48 0.55 0.61 0.68 0.68 0.74
DIFF_POD12_F
DIFF_POD12_M
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.55
0.43 0.48 0.48 0.55 0.52 0.58 0.58 0.63
DIFF_POD12_S
DIFF_SSTL12_DCI_F
0.43 0.48 0.48 0.55 0.61 0.68 0.68 0.74
0.43 0.48 0.48 0.55 0.46 0.50 0.50 0.54
DIFF_SSTL12_DCI_M
0.43 0.48 0.48 0.55 0.50 0.55 0.55 0.60
T_{OUTBUF_DELAY_TD_PAD}
1.0V
0.95V
Units
-3 -1H -2
-1
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.53 0.61 0.61 0.68 ns
0.59 0.68 0.68 0.76 ns
0.67 0.77 0.77 0.86 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.53 0.61 0.61 0.68 ns
0.59 0.68 0.68 0.76 ns
0.67 0.77 0.77 0.86 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
0.67 0.76 0.76 0.85 ns
0.58 0.65 0.65 0.73 ns
0.62 0.71 0.71 0.79 ns
0.69 0.79 0.79 0.88 ns
0.58 0.65 0.65 0.73 ns
0.62 0.71 0.71 0.79 ns
0.69 0.79 0.79 0.88 ns
0.58 0.65 0.65 0.73 ns
0.62 0.71 0.71 0.79 ns
0.69 0.79 0.79 0.88 ns
0.58 0.65 0.65 0.73 ns
0.62 0.71 0.71 0.79 ns
0.69 0.79 0.79 0.88 ns
0.54 0.62 0.62 0.68 ns
0.60 0.68 0.68 0.76 ns
DS893 (v1.7.1) April 4, 2016
Product Specification
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